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  • Generating a BOM

    Has anyone generated a BOM from OrCAD like this? I use version 16.5 here. I get close with variant report but I am not there yet. Any suggestions would be very welcome. Quantity#Part Reference#PART_NUMBER#VARIANT#LAYER 1#PCB1#P00001-1#1,2,#t 1#C1#P00002-0212#1,2,#t 1#C2#P00006-102#1,2,#b 1#C3#P00007...
    Posted to PCB Design (Forum) by Garry on Tue, Apr 16 2013
  • DXF import into Allegro 16.3 / 16.5

    I have used dxf imports before in Layout 15.7 and we had a simple way to use layers for the basic designs and then import a v12 dxf. But when I try to develop a basic board outline for Allegro 16.3 or 16.5, there does not appear to be a way of importing the plated and non-plated holes into a PCB. What...
    Posted to PCB Design (Forum) by tmd63 on Wed, Apr 10 2013
  • Via capacitance

    Hi, I am currently using Allegro 16.5. Pls let me know if there is any option to find out Via Capacitance . Thanks Bala R
    Posted to PCB Design (Forum) by Bala R on Wed, Apr 3 2013
  • allegro sp 16.5 lite - "error(spmhod-29)"

    Hi, i'm new to pcb design tool , i received some .brd and .dra and .psm file from my friend for my practice, he did this on Allegro sp 16.6 but i'm using Allegro sp 16.5 lite version. when i open those file i receive the following error. ERROR(SPMHOD-29): Unable to open design because database...
    Posted to PCB Design (Forum) by ping2murali on Wed, Mar 27 2013
  • Customer Support Recommended – Regulation Loop Design Using Allegro AMS Simulator (PSpice)

    Feedback regulation loops are widely used by power electronic designers. It is one of the most important and sensitive parts of a power supply circuit. An incorrect feedback loop design may cause oscillations in the circuit, and also increase the output voltage droops. In order to achieve a stable and...
    Posted to PCB Design (Weblog) by Naveen on Wed, Mar 20 2013
  • Static shapes not displaying solid.

    I have a couple of shapes used for edge protections etc which are static shapes to ensure that tracks do not destroy the protection provided. But when I try to see them onscreen, the filled area is a mesh of dots instead of a solid area. If I switch it to a dynamic shape, the display shows a solid area...
    Posted to PCB Design (Forum) by tmd63 on Fri, Mar 1 2013
  • New board has missing nets

    I have a new design and the schematic has transferred to PCB. But when I look at the design, some of the nets have a boxand cross instead of a rubberband net. I have not set any plane layers yet. When I open the constraint manager, 'Properties' shows the nets but 'Electrical' does not...
    Posted to PCB Design (Forum) by tmd63 on Tue, Feb 26 2013
  • Re: Soldermask-to-soldermask Clearance Check

    Hey Steve, What I need is to check the spacing between a soldermask (part of symbol/pin) and an extra soldermask (as a object/shape) which was only added to the board/design.
    Posted to PCB Design (Forum) by comet on Tue, Feb 5 2013
  • Re: acid traps and silkscreen check-166

    Hey Guys, I'm also interested on this silkscreen check over pads. However, I think the 'silkutils' skill available would only check if the pad or via has soldermask on it. What if mask is not present? Any other checking method or skill on this case?... Thanks!
    Posted to PCB Design (Forum) by comet on Tue, Feb 5 2013
  • Text (RefDes)-to-Copper DRC

    Hi Guys, Is there any DRC or skill to check the clearance between RefDes Text and any copper?... Thanks!
    Posted to PCB Design (Forum) by comet on Mon, Feb 4 2013
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