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 Community Search 

Page 1 of 1 (10 items)
  • Re: Group Pin swap
    Hi, How to assign function G1 G2 G3….in device file through viewdraw symbols or schematics? When we generate the netlist, we are getting a default function G1 along with all signal pin number. I could edit the device file manually, but it will not sync with Schematics. Pls suggest. Regards, Subbu
    Posted to PCB Design (Forum) by package design on Thu, Jul 4 2013
  • Re: Group Pin swap
    Hi, Thanks for all your responses. We are getting the following errors while we do make PCB (generating netlist). How to resolve this? Total errors - 0 and warnings - 0 pcb: Error 6092: zircon com SAPIR0: Bad hetero device SAPIR-1, symbol CURRENT_PROJECT:SAPIR_1 pcb: Error 6092: zircon com SAPIR0: Bad hetero device SAPIR-1, symbol ...
    Posted to PCB Design (Forum) by package design on Mon, Jul 1 2013
  • Re: Group Pin swap
    We are using View Draw for schematics and Allegro16.5 for layout. We ar enot getting an option of gate swapping in View draw. Is it possible to do anything in Cadence PCB Editor, APD or SiP?
    Posted to PCB Design (Forum) by package design on Thu, Jun 27 2013
  • Group Pin swap
    Hi, I have 4 diff.pairs as one group (1 Quad). I have an option of swapping the pins within the group or I can swap entire group to group. With swap code, I can do the swap within Quad (group). Is it possible to do group swapping (Quad to Quad)? We are using 16.5 and not using FPGA system planner. Regards,Subbu
    Posted to PCB Design (Forum) by package design on Wed, Jun 26 2013
  • Is there a way to import stack-up xls file into cross section?
    With Regards, Subbu 44262304  
    Posted to PCB Design (Forum) by package design on Wed, Oct 12 2011
  • Re: Add Via Shape - Package Design
     Hi All, Thanks for ur responses. Yes. It suppose to be Triangle. I have copy & Paste those shapes. That's the reason I have requested the Add via shape. It's something like Convex Hull program. The vias may be placed in any angle and depends on the via location shape should be added (any angle).  Regards, Subbu
    Posted to PCB SKILL (Forum) by package design on Mon, May 3 2010
  • Shape option in Via Structure
    Hi All,Is it possible to enable Shapes option in the Add via structure menu?
    Posted to IC Packaging and SiP Design (Forum) by package design on Mon, May 3 2010
  • uVia to SMD pin DRC's
     We have some UVIA to SMD PIN placement. It is possible that we have some uvia offset by pad center (Die size changes / copy / paste). Is it possible to check / flag DRC’s? FC bump :   (-7710.50 -3451.18) Via : (-7710.50 -3453.70) Note :  Via is offset from center of FC pad by 2 um and it should be placed at center. ...
    Posted to IC Packaging and SiP Design (Forum) by package design on Mon, May 3 2010
  • Add Via Shape - Package Design
     From BGA pin as well from Die bump we will be bringing vias to internal core layers. In the build-up layers there will be lot of same net vias. We would like to add a shape for the multiple vias (same net) to connect. Once I select a vias (same net) and click add shape it should add a shape to those selected vias and assign a ...
    Posted to IC Packaging and SiP Design (Forum) by package design on Mon, May 3 2010
  • Add Via Shape - Package Design
     From BGA pin as well from Die bump we will be bringing vias to internal core layers. In the build-up layers there will be lot of same net vias. We would like to add a shape for the multiple vias (same net) to connect. Once I select a vias (same net) and click add shape it should add a shape to those selected vias and assign a net ...
    Posted to PCB SKILL (Forum) by package design on Mon, May 3 2010
Page 1 of 1 (10 items)