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  • DRC and LVS error
    Hi all I have a .GDS2 file that got it from SOC Encounter and now i want to check DRC & LVS. To do this I import my .GDS2 file in cadence( CIW--> File--> Import) and after that i can see the layout of my design. Now I use calibre for DRC and LVS. But after running DRC i have some errors in addition to density errors that i cannot ...
    Posted to Custom IC Design (Forum) by samanehrh on Sun, Aug 18 2013
Page 1 of 1 (1 items)