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 Community Search 

Page 1 of 1 (6 items)
  • Re: Fatal Application Error in ASSURA av_extracted
    Hi Quek,   thank you very much! I let you know if with the new version, the system will work. Best regards Andrea.
    Posted to Custom IC Design (Forum) by Bayes on Tue, Jun 18 2013
  • Fatal Application Error in ASSURA av_extracted
    Hi, I am using 6.1.5 environment and I'm running ASSURA to perform DRC and LVS and it is all right. Unfortunatelly, then, when I try to run Assura Parasitic Extraction, to generate an extracted view (av_extracted), I have a serious problem since I have the crash of CADENCE and I don't understand where is the problem. In ...
    Posted to Custom IC Design (Forum) by Bayes on Tue, Jun 18 2013
  • Re: Creating/Importing Verilog-AMS Cell View
    Dear Andrew, firstly, I regret to have posted my problem more than one in the Forum. Then, I would like to thank you for the help and support. Now everything is working well. I can create VerilogA and VerilogAMS views utilizing File->New->CellView, with the Type set to "VerilogA" and "VerilogAMSText", respectively, and ...
    Posted to Mixed-Signal Design (Forum) by Bayes on Wed, May 29 2013
  • Creating/Importing Verilog-AMS Cell View
    I have a problem to import or create a VERILOG-AMS file.I have to import a device model which has been developed in Verilog-AMS (I have a file with ".vams" extension). In the following, I try to summarize and explain what I have done and tried. 1) I tried to import my file through the "IMPORT" tool of CADENCE but it seems ...
    Posted to Mixed-Signal Design (Forum) by Bayes on Mon, May 27 2013
  • Create/Import Verilog-AMS Cell View
    I have a problem with CADENCE, importing or creating a VERILOG-AMS file.I have to import a device model which has been developed in Verilog-AMS (I have a file with ".vams" extension). In the following, I try to summarize and explain what I have done and tried. 1) I tried to import my file through the "IMPORT" tool of ...
    Posted to Functional Verification (Forum) by Bayes on Mon, May 27 2013
  • Create/Import Verilog-AMS Cell View
    I have a problem with CADENCE, importing or creating a VERILOG-AMS file.I have to import a device model which has been developed in Verilog-AMS (I have a file with ".vams" extension). In the following, I try to summarize and explain what I have done and tried. 1) I tried to import my file through the "IMPORT" tool of ...
    Posted to Mixed-Signal Design (Forum) by Bayes on Mon, May 27 2013
Page 1 of 1 (6 items)