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 Community Search 

Page 1 of 4 (35 items) 1 | 2 | 3 | 4 | Next >
  • Re: component property display in schematic editor
    Hi Andrew,   I tried what you said and it worked! Now things can be moved around. I feel better now :-)   I tried setting aelPushSignifDigits(4) in CIW, but it does not appear changing it. May be as you said it is controled by PDK I am using. I will contact our foundry about this.   Thank you for ...
    Posted to Custom IC Design (Forum) by apple419 on Wed, Jun 18 2014
  • Re: component property display in schematic editor
    if open the transistor symbol in symbol editor, seems I can move those cdsparam() around to locations I desire. But this basically affects all instances of this transistor. How to adjust on just one isntance not affecting others? another thing, if I set for example w=150u. L=2.5u for a transistor, on the schem it actually shows W=160.00000u and ...
    Posted to Custom IC Design (Forum) by apple419 on Wed, Jun 18 2014
  • component property display in schematic editor
    Hi, candece virtuoso users:    Is there a way to move the component property dispaly locations? For example a nmos transistor, on the scheamtic it shows its instance name, cell name, w, l, multiplier, etc. It looks like those parameter locations are fixed and can not be moved. Sometimes I wish I could move things around to better ...
    Posted to Custom IC Design (Forum) by apple419 on Tue, Jun 17 2014
  • Re: spectre stb analysis to show poles and zeros
    Thanks Andrew, thanks Frank,    Yes stb analysis calculates the open loop response without really "breaking" the loop. pz analysis just calculates poles and zeros from A to B based on your input. So in my understanding pz analysis is not really useful for stability analysis, because for stability we mostly care open loop ...
    Posted to Custom IC Design (Forum) by apple419 on Fri, Jan 31 2014
  • spectre stb analysis to show poles and zeros
    My system: IC6.1.5   In stb analysis, based on the bode plots I am able to approximately see where the poles and zeros are. But sometimes I would like to know the exact locations of poles and zeros. Is there a way to print out all the poles and zeros?   I know pz analysis can show poles and zeros, but in a feedback system I need to ...
    Posted to Custom IC Design (Forum) by apple419 on Thu, Jan 30 2014
  • Re: waveform processing question in Virtuoso ViVA
    Tawna, Andrew,   I got it. It works beautifully. Thanks for all your help!  Regards  Apple 
    Posted to Custom IC Design (Forum) by apple419 on Fri, Jan 17 2014
  • waveform processing question in Virtuoso ViVA
    My system: Cadence IC615  Sometimes when I do a DC sweep, I need to rearrange the X and Y axis.  For example, in a voltage DC sweep, I got two signals shown on the viva. Var1 vs voltage, and Var2 vs voltage. In these two graphs, both have voltage as X axis. But if I want to see hwo Var2 varies with regarding Var1, meaning Var1 is my X ...
    Posted to Custom IC Design (Forum) by apple419 on Thu, Jan 16 2014
  • Re: help on using diode model in Spectre simulation
    It seems like it doesn't draw the diode current if the marker is on the diode pin. But if I add a series 0V VDC with the diode then it works. It shows the VDC current which is same as the diode current. Strange. Seems like it has to do with the subcircuit... I also found Spectre can directly simulate the PSPICE .subckt. One change has to make ...
    Posted to Custom IC Design (Forum) by apple419 on Wed, Dec 18 2013
  • help on using diode model in Spectre simulation
    HI,     I created a sample diode model file testdiode.scs as following: simulator lang=spectre subckt testdiode (ac) d1 (a c) d01 model d01 diode +is=14n n=2 rs=33m cjo=26p m=0.4 vj=0.3 ends testdiode  Then I include testdiode.scs in ADE > Setup > Model Libraries. Next I put a "diode" symbol  from ...
    Posted to Custom IC Design (Forum) by apple419 on Tue, Dec 17 2013
  • Re: how to set the voltage initial condition between two nodes?
    Andrew,    I tried what you suggested and it worked!    It is different from PSPICE. Previously with PSPICE the initial condition setting applies to both transient and DC/AC case and I don't need to have to force it. Here with Cadence by default it only applies to transient. Thanks a ...
    Posted to Custom IC Design (Forum) by apple419 on Thu, Dec 12 2013
Page 1 of 4 (35 items) 1 | 2 | 3 | 4 | Next >