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  • Re: Using Eplanner with UVM
    Hi Steve. Yes I was referring to UVM-SV. I implemented your way round the limitation and I was able to map check in the Eplanner. My way round the limitation was to introduce an interface with the signals that are not actually connected to DUT but just used as auxiliary signals which are set from the monitor and then I implemented assertions on ...
    Posted to Functional Verification (Forum) by rdalibor on Tue, Aug 14 2012
  • Using Eplanner with UVM
    I am trying to implement checkers in my UVM environment from my vPlan and to map them in Eplanner. However, in the Eplanner I can only see the checks that I implemented as assertions in interfaces but not the checkers I implemented as assertions in my UVM monitor. Could anyone explain me how should I implement checkers in my UVM monitor in order ...
    Posted to Functional Verification (Forum) by rdalibor on Mon, Aug 13 2012
Page 1 of 1 (2 items)