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 Community Search 

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  • .so cell import ?
     Hello, I was given a component in a .so format (compiled verilogA would be my guess) and i would like to make it a cell in virtuoso to include it in a schematic and simulate it with spectre. Do you guys know how to do that ? One told me to create a veriloga cellview then include this symbol in my schematic and then to ...
    Posted to Logic Design (Forum) by DavidRo on Fri, Jul 13 2012
Page 1 of 1 (1 items)