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 Community Search 

Page 1 of 6 (53 items) 1 | 2 | 3 | 4 | 5 | Next > | Last »
  • Re: PIN SWAP OPTION IN CONCEPT HDL
     Hi, Now i  enabled the swaping option in .prt  file and swapped the pins as per my requirement in layout. I am trying to back annotate from the layout to sch but its not working. its shows error(attached). any one please let me know back annotation process in concept hdl. please share your knowledge.    
    Posted to PCB Design (Forum) by KARPCB on Wed, Jun 11 2014
  • Re: PACKAGE ERROR IN CONCEPT HDL
     Thanks a lot chad. in this part file RESET_n is mismatched between symbol and part file. i modified and solve the problem. In the same part file i have to enable the swap pin also and import to board file then  swap the pin as per my requirment. after swapping i was trying to backannotate but its not working. its shows some ...
    Posted to PCB Design (Forum) by KARPCB on Tue, Jun 10 2014
  • PACKAGE ERROR IN CONCEPT HDL
     Hi All, i got errors while generating netlist. please refer the attached image and give me a solution.   Error: #1   ERROR(SPCODD-5): Pin 'RESET_N' on the following primitive instance canno~ t be packaged in package of type ...
    Posted to PCB Design (Forum) by KARPCB on Tue, Jun 10 2014
  • Re: PIN SWAP OPTION IN CONCEPT HDL
    Hi John, Thanks for your reply. I am using ADW. so, i can't access library.is this any way to enable swap pins in sch like capture CIS.  Thanks, Karthik.
    Posted to PCB Design (Forum) by KARPCB on Thu, Jun 5 2014
  • Re: PIN SWAP OPTION IN CONCEPT HDL
    Hi All,  i am using ADW. Anyone please let me know how can i enable the swap pins in sch.  Thanks, karthik.
    Posted to PCB Design (Forum) by KARPCB on Thu, Jun 5 2014
  • Re: PIN SWAP OPTION IN CONCEPT HDL
    johan,   How can i access the pin group in the symbol?   Thanks, Karthik.
    Posted to PCB Design (Forum) by KARPCB on Tue, Jun 3 2014
  • Re: A question about fanout via size?
    Try this one http://www.cadence.com/community/forums/T/29470.aspx  
    Posted to PCB Design (Forum) by KARPCB on Thu, May 29 2014
  • Re: HIGHLIGHT VIA
     Thanks for your answer. Now im using 16.6 P004 ver so,not getting via highlight option. if any other way is there means please let me know.  
    Posted to PCB Design (Forum) by KARPCB on Thu, May 22 2014
  • HIGHLIGHT VIA
     Hi All, Is this possible to higlight certain group of via by name. Example : i have 4 type of via like via6d12p, via6d12p-t,via6d12p-b,via8d16p. I need to highlight and see the  via6d12p only. is this possible?  Thanks, Karthik.
    Posted to PCB Design (Forum) by KARPCB on Thu, May 22 2014
  • Re: 0_5 MM BGA FANOUT STRATAGIE
    Hi kabalee, In VIP using 6/12 via means the via – via airgap is 7.685mil. So, inner layer trace width is 3 mil and trace to via spacing is 2.3mil. In Fanout using 6/12 via means the via – via airgap is 7.685mil. So, inner layer trace width is 3 mil and trace to via spacing is 2.3mil. Its possible to increase inner layer trace width ...
    Posted to PCB Design (Forum) by KARPCB on Wed, May 21 2014
Page 1 of 6 (53 items) 1 | 2 | 3 | 4 | 5 | Next > | Last »