Re: Error when combining AXI UVC and AHB UVC
You're correct. This problem is really related to the bus ID width VR_AXI_MAX_ID_WIDTH.
The ID width of my design is 13-bit. So I set VR_AXI_MAX_ID_WIDTH=13. The large number resulted the failure. When I reduce it to VR_AXI_MAX_ID_WIDTH=4, my simulation works.
But the "-defineall VR_AXI_LARGE_ID" doesn't ...