Technical Tip on How to Use HDL Assertions in e
By
Team Specman
on
September 28, 2011
While assertion callbacks have existed in Specman/e for several years now, several questions on their usage have surfaced recently, so here is a short refresher on their usage. ABV (Assertion Based Verification) is, more and more, becoming an important
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If Only Carl Friedrich Gauss had IntelliGen in 1850
By
Team Specman
on
August 18, 2011
The N-queens issue is a challenging but standard puzzle when it comes to the world of constraint solving. It's a generalization of the 8-queens puzzle, whose description can be found in detail in Wikipedia ( http://en.wikipedia.org/wiki/Eight_queens_puzzle
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Full Sequence Coverage in a Single Line of e Code?
By
Team Specman
on
June 28, 2011
I was asked recently about how to easily collect coverage on the sequences generated by the verification environment. Since this question has come up before, I thought I would take this opportunity to write a short blog on how to quickly and easily collect
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Video: Update on AMIQ’s DVT IDE at DAC 2011 – Specman Debugger Integration, Open API
By
Team Specman
on
June 22, 2011
Specmaniacs and IES-XL users around the world know that Integrated Development Environment (IDE) and verification services provider AMIQ has been in the vanguard of supporting e RM, OVM, and now the full production UVM. At DAC 2011, AMIQ introduced a
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Is e Old? Yes. Is it Outdated? Definitely Not!
By
Team Specman
on
June 16, 2011
I was at the Design Automation Conference (DAC) last week showcasing our latest, greatest Incisive Enterprise Simulator (IES) performance features in the demo suites. In my "off" time, I was in our DAC booth meeting customers and discussing
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Specman Application Note: Improving Verification Productivity With Dynamic Load and Reseeding
By
Team Specman
on
March 1, 2011
Are you looking for new approaches to improve your verification productivity by 40 - 60%? Look no further... read the technical application note by Corey Goss on how to Improve Verification Productivity through Adopting Dynamic Load and Reseed Methodology
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Support for e Language Macros in Amiq DVT Tool
By
Team Specman
on
January 25, 2011
DVT ( D esign and V erification T ools), a product offering from a 3rd party vendor, AMIQ , is for verification engineers working with e and SystemVerilog who are dissatisfied with the limitations of plain text editors and plain text searches (grep) when
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Specman/e Users Voice Their Opinions on Benefits of e over SystemVerilog
By
Team Specman
on
January 18, 2011
A recent customer blog interview with Geoffrey Faurie from ST Microelectronics and Richard Goering from Cadence was posted on Cadence.com with the title: " Is e or SystemVerilog Best for Constrained-Random Verification? " This blog post has
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Achieve the Next Level of Verification Productivity with Specman Advanced Option
By
Team Specman
on
January 18, 2011
Advanced verification customers are seeing their verification environments getting more and more complex requiring millions of lines of code spread across hundreds, even thousands of files that are re-used from Block --> SoC --> System level. Today's
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Applying Digital-Centric Verification Methodologies to Analog
By
Team Specman
on
January 12, 2011
A majority (if not all) SoCs today are mixed signal. Increasingly, the analog and digital portions of the design are inseparable. It is not possible any more to decompose them into separate analog and digital functions. Nothing can be treated as a black
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