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Joseph Hupcey III

I am a product management director supporting our Silicon Realization product line via Formal and multi-engine verification tools and methodologies. Before going over to "the dark side" (marketing), I worked as an EE in FPGA design, EDA tools for FPGAs and ASICs, and ASIC verification. I have been a marketing guy for over 10 years now, including a stint in consumer electronics (anyone remember the Handspring "eyemodule"?) before returning to the EDA world.

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DVCon 2013: Functional Verification Is EDA’s “Killer App”
With another year of record attendance, DVCon has again proven that a functional verification-focused mix of trade show and technical conference is what customers need to get their jobs done. Here are some of the some of the highlights I took away from   Read More »
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2013 CES: Top 4 Trends Benefiting EDA
While a variety of EDA customer segments are growing, consumer electronics continues to drive the lion's share EDA of industry revenues. Hence, many events at last week's annual Consumer Electronics Show (CES) in Las Vegas can be extrapolated   Read More »
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Lessons for EDA When Low Power vs. Heat Dissipation Isn’t a Fair Fight: A Case Study With the GoPro Hero2 Camera
Right up there with functional verification, the challenges of low power design and verification present an existential threat to our customers' products, and ultimately their businesses. Clearly both sides of the low power coin -- reducing generated   Read More »
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Video: Interview with Professional Teenage Technology Coach Kristine Bonhoff
Over the past several years at various EDA trade events, one of the more popular forums have been panel discussions and interviews asking teenagers about the technology in their daily lives. However, those forums have been comprised of amateurs, whereas   Read More »
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Video: DVCon 2012 Digital-Mixed Signal (DMS) Expert Neyaz Khan on UVM Mixed Signal (UVM-MS)
E-mail reminders for the DVCon 2013 Call For Abstracts prompted me to look through my DVCon 2012 folder -- lo and behold I came across the following video interview. It was shot during the show, but the official approval fell between the cracks and didn't   Read More »
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DAC 2012 Video: Dr. Kerstin Eder, University of Bristol, About Her Course on Functional Verification
Dr. Kerstin Eder, a Senior Lecturer in the Computer Science department at the University of Bristol, UK , teaches a course on functional verification. In this interview she outlines how the course is structured, what makes for a good verification engineer   Read More »
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Video: DAC 2012 Update on AMIQ’s DVT IDE – New RTL Design Work Flow Support
Readers of this blog and of Team Specman will recall that Integrated Development Environment (IDE) and verification services provider AMIQ has been in the vanguard of supporting functional verification methodologies and testbench creation for years. The   Read More »
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DAC 2012 Video: R&D Fellow Mike Stellfox on the Emerging Bottlenecks in SoC System Verification
R&D Fellow Mike Stellfox leads a group of trailblazers inside Cadence. Specifically, Mike's group is tasked with moving our most promising prototypes and methodological theories out of their incubators and into production. In this interview on   Read More »
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Video: DAC 2012 Discussion with EET's Brian Fuller on EDA and Video
Continuing our conversation on leveraging social media for EDA, at the Design Automation Conference (DAC 2012) I had the honor of interviewing again with EETimes editor Brian Fuller -- this time the focus of the conversation was on video. Specifically   Read More »
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Photo Essay and Comments on DAC 2012 in San Francisco, CA
In addition to the annotated image gallery (click here or on the image), below are some long form comments on particular aspects of this year's Design Automation Conference (DAC 2012). Verification momentum - I grant that I might be influenced by   Read More »
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