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Blogger

Ran Avinun

I am the marketing group director for the System Design and Verification segment at Cadence. I served Cadence/Quickturn in the last 11 years in senior marketing management positions with focus on the acceleration, emulation and system-level markets.

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The Challenge of System Integration and Bring-Up
In the last few years, I have talked with many companies and analysts and consistently heard that system integration time is becoming one of the key challenges in system development. Many companies spend 50% of their total development cycle on system   Read More »
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Why the Demand for Acceleration and Emulation is Growing
The dream of any marketer is a growing demand for its product line. Let me start this blog by quoting the System Realization (part of the Cadence EDA360 strategy) section from the transcript of the recent (Q4) Cadence earnings call. "In April (2010   Read More »
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System Industry Trends - 2010 Highlights and What's Coming Up for 2011 (Part II)
2010 was a very dynamic year for the electronic systems industry overall and Cadence in particular. In this set of blogs, I discuss some of the trends that started in 2010 and will continue in 2011. In part I, I talked about the key growth market, key   Read More »
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System Industry Trends - 2010 Highlights and What's Coming Up for 2011 (Part 1)
2010 was a very dynamic year for the electronic systems industry overall, and for Cadence in particular. In the next couple of blogs, I would like to focus on some of the trends that started in 2010 and will continue in 2011. In this blog (part I), I   Read More »
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System Bring-Up - THE Critical Path in the System Development Process
The electronic industry is moving from hardware-defined products to software-defined and application-driven products. As a result, product differentiation shifts to software content while hardware platforms and their development processes increasingly   Read More »
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User Views -- Migrating From FPGA-Based Prototyping to Palladium
In recent posting published by John Cooley on Deepchip.com, users compared FPGA-based prototyping systems to Palladium systems. I always like to read responses that reflect user views -- as we all know these are always more credible. I would like to summarize   Read More »
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CDNLive! -- Israel and the U.S.
The Cadence Design Network provides a great way to learn about the latest design and verification methodologies offered by Cadence, and the ways customers are using them. I had the pleasure to attend CDNLive! in Israel last week. For me, visting Israel   Read More »
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Silicon Hive CTO: How Transaction-Based Acceleration Speeds IP Verification And Prevents TV "Crashes"
Jeroen Leijten is Chief Technology Officer for Silicon Hive , a Dutch company that has quickly become one of the world's leading intellectual property (IP) providers of imaging and video processing solutions for rapidly changing market segments such   Read More »
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System Development – What To See At DAC 2010
The EDA360 vision paper specifies key System Realization challenges. Embedded software development and verification are rapidly becoming the key increasing cost factors for the electronics industry. Integration and re-use are becoming critical for the   Read More »
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TLM 2.0 As Part Of The EDA360 Vision
Ann Steffora Mutschler recently covered in her blog the progress the industry has made with OSCI transaction-level modeling (TLM 2.0) and the requirements moving forward. Per my quote in the blog, Cadence is a big advocate of standards-based designs and   Read More »
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