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 Cadence Member: About Ed JM 

Ed JM   | 110 points
San Jose, CA
Cadence Product Market Manager
Member since: September, 2008
Bio 15+ years in ASIC and IC design industry
10 years IC and EDA marketing and business development
Interests in process, profitability, ecosystem relationships, and implications to software solutions and industry/customer success
Academic Background Boston University College of Engineering (BSEE)
Boston College Carroll School of Management (MBA)
Suffolk University School of Law (JD)

Organization Affiliations No profile info has been provided Community Interests Functional Verification
Logic Design
Digital Implementation
IC Packaging and SiP Design
Custom IC Design
Personal Interests No profile info has been provided Publications Other Online:  www.linkedin.com/pub/1/79b/36a
My Friends

EDA360: Enlightenment for Silicon Test
by Ed JM

Enabling Profitable Silicon Production: A Learning ‘Neural’ Network for Yield Ramp
by Ed JM

Logic Design and Test Design: Do they need each other?
by Ed JM