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 virtuoso possible outputs in IC610 

Last post Mon, Aug 11 2014 10:05 AM by Andrew Beckett. 1 replies.
Started by jagdev 25 Jun 2014 08:00 PM. Topic has 1 replies and 911 views
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  • Wed, Jun 25 2014 8:00 PM

    • jagdev
    • Not Ranked
    • Joined on Thu, Jun 26 2014
    • Posts 1
    • Points 20
    virtuoso possible outputs in IC610 Reply
    Hi,
    needed some help in using cadence IC610. Is there an provision in the Analog design environment or else where in virtuoso which directly gives the below values-

    power consumption

    capacitance

    area occupied

    propagation delay

    for example if the above are to be calculated for a cmos NAND circuit.
     
    regards
    • Post Points: 20
  • Mon, Aug 11 2014 10:05 AM

    Re: virtuoso possible outputs in IC610 Reply

    Not really. The first, second and fourth could be calculated from the results of suitable simulations, whereas the area occupied would have to be some estimate based on the size of the transistors.

    Andrew.

    • Post Points: 5
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Started by jagdev at 25 Jun 2014 08:00 PM. Topic has 1 replies.