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 AMS Supply sensitivity in a text based testbench 

Last post Tue, Jan 21 2014 4:15 AM by Amblikai. 0 replies.
Started by Amblikai 21 Jan 2014 04:15 AM. Topic has 0 replies and 3603 views
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  • Tue, Jan 21 2014 4:15 AM

    • Amblikai
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    • Joined on Tue, Feb 5 2013
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    AMS Supply sensitivity in a text based testbench Reply

     Hi i'm having an issue where i'm running a VerilogAMS testbench, which can instantiate verilogams blocks or their schematic equivalents. The verilogams models have supply sensitivity statements on the IO pins, so that when running a purely verilogams flow, i have no issues. However when swapping one of the verilogams views for schematic, i get errors about supply sensitivity. 

    I'm not sure how to set the supply sensitivity attributes for schematic views, when i have a text based top level/testbench. I can provide more information if required.

    Can anyone help or point me to some documentatio?

    I have also cross posted here:

    http://www.designers-guide.org/Forum/YaBB.pl?num=1387738613

    Any help would be greatly appreciated. Thanks.

    • Post Points: 5
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Started by Amblikai at 21 Jan 2014 04:15 AM. Topic has 0 replies.