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 Need help about designing logic gates schematicin Cadence Allegro 

Last post Mon, Nov 25 2013 4:10 PM by maruf ahamed. 0 replies.
Started by maruf ahamed 25 Nov 2013 04:10 PM. Topic has 0 replies and 937 views
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  • Mon, Nov 25 2013 4:10 PM

    Need help about designing logic gates schematicin Cadence Allegro Reply

    Hi, 

    I am new  user of Cadence Allegro. I am trying to design a CMOS ROM in Cadence Allegro. I am using in Widows platform. Can anybody suggest me which tools (e.g. AMS simulator, or OrCAD or Physical viewer )of Allegro will be best suit for this.

    Thanks, 

    MARUF

    • Post Points: 5
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Started by maruf ahamed at 25 Nov 2013 04:10 PM. Topic has 0 replies.