Hi, Cadence users,
In the process of learning Cadence...
I created a new cell adder8 with Verilog functional view. Its symbol is also created. Now there are two views for adder8. One is functional view, and the other is symbol view.
My question now is how do I simulate it (digitally)?
Should I use NC-verilog? In CIW I chose tools -> NC-verilog. The verilog environment for NC-verilog integration form appears.
Then I filled in the Run directory, Top level design (library, cell, view), and the simulation mode (interactive), selected all three options (compile, elaborate, simulate.)
What is next? initialize design? generate netlist?...
I am a beginner Cadence user. So could anyone describe the detail step by step direction? Or is there such tutorial available in this forum?
I am using Cadence IC615.