PCB Design

Background color ot text when doing edit

mred — Fri, 20 Nov 2009 17:46:28 GMT

When editing text the back ground color is black. While I have the design background as black I can not see the text line on screen when in edit. This must be a simple setting I have not found it.

Autoroute nets that have propagation delay and relative propagation delay

Neha Anu — Thu, 19 Nov 2009 12:11:57 GMT

Hi all,

I've to autoroute nets (A1,A2..A8) that are matchgrouped (MG1) with pin pair longest pin pair and with propagation delay .

How can I autoroute the above nets using the do file in the Specctra autorouter using the command Route->Route Editor??

Can anyone plsss xplain wats the do file command for the above scenario??

Thanx

Neha.

Thermals positive planes, negative planes I'm confused

stellar — Thu, 19 Nov 2009 17:47:58 GMT

In Layout planes were always negative. I'd like to use positive planes on the present board but I don't see any connectivity on the artwork where there should be. I've defined my via as a 10mil drill with 30mil regular pad. For thermal relief I have a flash symbol defined for inner layers and my antipad is 50mil. When I set the layers to negative I see the thermals correctly. for positive planes do I need to define the inner thermal relief as a pad instead of a flash? Also if I can succeed in learning how to use positive planes I'd like no thermals on vias at all just flooded. I don't like the missing spokes and don't think thermals are necessary on vias.

Syntax of the relative propagation delay using do file

Neha Anu — Wed, 18 Nov 2009 06:42:01 GMT

Hi all,

I'm routing the brd file using the command Route->Route Editor by using the .do files.I want to route some nets for eg: (P0,P2,P3..P7)having relatively same propagation delay.Can Anyone pls reply how to make do file syntax for this relative propagation delay??

Thanx

Neha

Edit and Show reference designator/pin numbers in Cadence Design Entry

EdwardHU — Mon, 16 Nov 2009 20:40:59 GMT

In the transition to use Cadence PCB tools. Have used Altium/PCAD a lot in my previous careers.

Unfamiliar with the way that Cadence tool processes. After I add a component to the schematics entry tool (concept), why I don't see the reference designator and the pin numbers of the component? I tried all menu and have not found a way to do it.

Regards,

Ed

status of selected nets for routing

stellar — Thu, 19 Nov 2009 16:26:36 GMT

In Layout you could see the route completion status of selected nets at a glance. So far I can't figure out a way to see the same in Editor. The unconnected pin report considers all the nets in the design as does the Display/status. There must be a report that shows the status of the selected nets.

Routing nets with propagation delay

Neha Anu — Wed, 18 Nov 2009 10:31:35 GMT

Hi to all,

I'm currently using the specctra autorouter.I tried to route the some nets that have same driver and receiver and set propagation delay for that nets in the constraint manager.I've then autorouted the .brd file using the .do file by grouping the netsand giving the commands to route that file.But some of the nets are not obeying the delay rule y??Can anyone plssss xplain this??

Thanx

Neha

Edit board outline

mdschulte — Fri, 13 Nov 2009 21:03:00 GMT

Hello, I am very new to PCB Designer and I have what is probably a very easy question. I have a board outline created and I need to modify it (make a notch on one side). If this were a typical CAD program I would just add the line segments that correspond to the notch and then use a trim command to make the board edge become the notch line segments, but I can't seem to come up with any way to do a trim. Anyone have any suggestions? Thanks in advance for any assistance. Matt

Paning the board using Keyboard arrow,etch priority,anti etch region during package creation

MAAC — Mon, 16 Nov 2009 09:12:26 GMT

Hi,

I have a few queries in OrCAD PCB Designer-16.2

> How can i adjust the Keyboard arrow keys so that i can pan the board w.r.t. mils

> How can i add etch priority for copper pour which is in a same conducting layer-say priority 1, 2 which helps while fabrication for clearance

> How can add a region or shape while creating the Package symbol, so that particular region will not get any copper pour added, where that particular region is used for drilling.

Thnx.

Changing text size and Autosilkscreen

stellar — Tue, 17 Nov 2009 22:58:51 GMT

I guess the refdes size comes in from the symbol but is there a way to select all the refdes on the board and set the size to whatever you want?

What does autosilkscreen do? It seems it moves text around to get it off pads and place outlines but I haven't observed that just think I read that. When I run it nothing happens to the text locations.

autorouter

yogeshyogesh — Wed, 18 Nov 2009 16:27:11 GMT

Upto what percentage of routing does Autorouter (Allegro 16.2) cover. For example, lets say it is a fiarly complicated board, 12 layer, 800 components, 4x6 inches, with Digital, Power, Analog, and RF sections. Any sucess numbers you can share?

Experts please chime in.

symbol creation and padstacks

stellar — Sat, 14 Nov 2009 17:58:14 GMT

I'm using a free tool to enter the package geometry from the data sheet which generates the preferred IPC pads and spacing but then I have to go the padstack creator to use the data and then create the symbol. Is there a better way to create footprints in Editor or is there and upgrade to Editor that will do a better job. Ideally you'd just enter the data sheet mechanicals and out comes a footprint.

Placing parts and cross probing

stellar — Tue, 17 Nov 2009 23:20:21 GMT

I hope this isn't redundant but I might have ask similiar already but having worked more with Pcb Editor I am more clear on what I'd like to have happen. In Layout I used the GROUP property to assign numbers to groups of parts then could quickly place them one after the other hitting the N key for the next component in the group. I could place a board in no time so am missing this capability. I understand editor has ROOM properties but unlike Layout it appears you need some idea as to where the parts will reside ahead of time and you have to create a ROOM shape for them. In Layout the cluster could be place arbitrarily anywhere.

In Layout you could select a part and it would highlite in the schematic and you could move it to a location. In editor is appears that when highlite is enabled you cannot move the part. So far I'm missing this dynamic highlite and move capability. Perhaps Editor can do this and I don't have it set correctly. Presently I'm turning on Highlite to get my bearings in the Schematic then turning it off to move the part which has to be a novice operator technique.

Alternatively do most designers select the part in the Schematic then right click and choose the Select in Editor feature to place parts?

missing silkscreen text

stellar — Tue, 17 Nov 2009 16:56:16 GMT

I have the subclasses set as

BOARD GEOMETRY/SILKSCREEN_TOP

PACKAGE GEOMETRY/SILKSCREEN_TOP

BOARD GEOMETRY/SILKSCREEN_TOP

I see package outlines but no text in the output.

PCB Editor ratsnest color and range and shape edit

stellar — Sat, 14 Nov 2009 15:39:28 GMT

All my ratsnests are yellow. I don't see a way to set the color of a net.

Is there a way to simply select the edge or corner of a shape to resize it?

Is there a way to limit the range of ratsnests? I'd like to be able to choose a window and have the rats limited to that window so it will be easier to focus on those components first.

Sorry another question but what exactly is a pad on a layer that doesn't have a net connected to it? I see something about suppressing them at artwork generation time but I think the padstack has to be set to automatic. I don't recall Layout having such pads but maybe it did.

Concept HDL-Footprint Assignment

Vijay143 — Fri, 13 Nov 2009 09:59:14 GMT

Is it possible to assign two or more footprints for a single symbol in Concept HDL schematic.

If yes how? If anybody knows pls tell me.

Regards,

Vijay

V16.2 new feature - teardrops magically appearing

LanceAZ — Mon, 16 Nov 2009 20:24:29 GMT

When we delete a cline segment from a pad that has more than one connection on it, teardrops are automatically added to the remaining pad entry segments. Where is the setting for this?

Unexpected error in the pad designer of cadence

Neha Anu — Wed, 11 Nov 2009 04:22:57 GMT

Hi all,

I've a problem while creating the pad in the cadence pad designer.

When I try to create a pad, it encounters a problem saying that the "Program has encountered a problem and must exit".

Can anyone pls explain wats the problem and what will be solution to this?

Thanks,

Neha.

Rules in the .do file

Neha Anu — Mon, 16 Nov 2009 09:15:20 GMT

Hi all,

The constraints (line or trace width) are set on the constraint manager on the Allegro PCB Design GXL,and tried to route the board file using Route->Route Editor.In the Specctra ,the board file is routed using the .do file.In the do file also i've set the width (not equal to the constraint set in the constraint manager).After auto-routing the board,its seen that the trace width is set as specified in the constraint manager.Why is it not obeying the rules specified in the .do file??Please xplain..

Thanx,

Neha

Warning:Design Rules:No rules found in design file.Please read rules from dofile

Neha Anu — Mon, 16 Nov 2009 05:08:48 GMT

Hi all,

On clicking the route->route editor the Editor window opens.There's a warning like "Design Rules:No rules found in design file.Please read rules from dofile"What step should be taken against this warning?

Thanx,

Neha

How can we minimise the errors created while autorouting the board in the specctra autorouter?

Neha Anu — Fri, 13 Nov 2009 05:20:21 GMT

Hi all,

I've autorouted the .brd file by Route ->Route Editor command in the Allegrto PCB Design GXL.I heard that the constraints set on the Allegro PCB Design GXL is transported to Specctra while giving the above command for autorouting.I've set the constraints such as line to line spacing,pad to line spacing etc,still these errors are generated after the .brd file is routed in the specctra.how can we minimize these errors?Is there any settings for this?

Can anyone pls xplain this?

Thanx

Neha

Cut line ??

Nancie — Fri, 04 Sep 2009 16:03:41 GMT

Hi,

I search some help on the net, but I don't know what I search! I explain.

I want to make a big board with some cut on it so I can have a lot a little board.

But how do we name this cut? Cutting edge? Cutting line?

Thanks

Cutouts in PCB Designer

fristu — Fri, 13 Nov 2009 13:13:55 GMT

I am relatively new to PCB Designer v16.2 (and this forum), but would like to know what is the process I should folow to create a cutout in my PCB. Thank you in advance for any assistance.

Capture BOM tool Line Item Definition defaults

dawg — Thu, 12 Nov 2009 21:49:36 GMT

Is there any way to change the default Header and Combined Property string to a user defined one such that I dont have to edit these lines for every project to make them be what I want them to be?

Constraints in the specctra autorouter

Neha Anu — Fri, 13 Nov 2009 09:43:10 GMT

Hi all,

I'm autorouting the board file using the command Route->Route Editor.I've set some constraints such as pin to line spacing,pin to via spacing etc.I want to route the brd file in specctra using the do file.I would like to know that whether the router takes only the commands and constraints set on the do file only or use the constraints inherited from the Allegro PCB Design GXL.Pls xplain if anyone knows this..

Thanx

Neha