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 CDR for USB 3.0 PHY  

Last post Wed, May 28 2014 1:35 AM by Jithin. 2 replies.
Started by Jithin 20 May 2014 04:01 AM. Topic has 2 replies and 1992 views
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  • Tue, May 20 2014 4:01 AM

    • Jithin
    • Top 500 Contributor
    • Joined on Wed, Mar 7 2012
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    CDR for USB 3.0 PHY Reply

    Sir,

         I am modeling a Dual loop CDR for USB 3.0 PHY. As per jitter budgeting of USB 3.0, it specifies a deterministic jitter of 143pSec and random jitter of 4.03pSec. As I was trying to model random jitter using Verilog A function $dist_normal (seed, mean, sd) with mean=0 and sd=4.03p and similarly deterministic jitter using $dist_uniform (seed, start, end) with start= -71.5p and end= 71.5p, my CDR was unable to track data having deterministic jitter of 143pSec for a data rate of 5Gbps (but CDR tracks data if the jitter value is half of the specified above, that is below 80ps). So my query is that,

     

         Is this the right way to model deterministic jitter and random jitter? And also do we have to add this much of Jitter into the data for a data rate of 5Gbps?

    Thanks and Regards,

    Jithin 

    • Post Points: 20
  • Tue, May 20 2014 11:09 AM

    • smlogan
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    Re: CDR for USB 3.0 PHY Reply

     Dear Jithin,

     > Is this the right way to model deterministic jitter and random jitter?

    I do not think your model accurately captures the frequency characterstics of the entire channel. Specifically, from the USB 3.0 standard, the TX components of the random and deterministic jitter are specified after the application of the appropriate jitter transfer function (Note 6, Table 6-8 of standard). As such, the magnitude of the random and deterministic jitter components will vary with frequency. Similarly, the receiver jitter components will also vary with frequency and I am not sure how you are capturing that in your model.

    As a result of using your model, when you simulate the CDR, that has a known jitter tolerance depending on its bandwidth, you may be applying far too much jitter at frequencies beyond the tracking capability of the CDR. This will reduce the eye margin and may lead to bit errors.

     > And also do we have to add this much of Jitter into the data for a data rate of 5Gbps?

     I would recommend, Jithin, that you study the USB 3.0 document entitled "USB Superspeed Compliance Methodology" and the USB 3.0 receiever and transmitter physical layer compliance sections of the USB 3.0 standard to create a more accurate model of the pertinent noise profiles.

     

    I hope this helps,

    Shawn

    • Post Points: 20
  • Wed, May 28 2014 1:35 AM

    • Jithin
    • Top 500 Contributor
    • Joined on Wed, Mar 7 2012
    • Posts 28
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    Re: CDR for USB 3.0 PHY Reply
    Sir, First of all I would like to thank you for your quick reply and also its been a very fruitful advice. Regards, Jithin
    • Post Points: 5
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Started by Jithin at 20 May 2014 04:01 AM. Topic has 2 replies.