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 Fabrication issue in Virtuoso layout design. 

Last post Thu, Oct 24 2013 9:22 AM by bjstroll. 6 replies.
Started by bjstroll 13 Oct 2013 06:03 PM. Topic has 6 replies and 2614 views
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  • Sun, Oct 13 2013 6:03 PM

    • bjstroll
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    • Joined on Sun, Oct 13 2013
    • Posts 5
    • Points 85
    Fabrication issue in Virtuoso layout design. Reply

    Hi,

    In virtuoso, there is select layer over active layer to identify the tpye of the active layer, along with related design rules (like select layers can not overlap).

    My question is when we use n-well or p-well process, we need to moderate dope our substrate to create wells first, but why there is not a select layer to identify what kind of wells we want and not related design rules?

     Regards,

    stroll 

    • Post Points: 20
  • Mon, Oct 14 2013 9:31 AM

    Re: Fabrication issue in Virtuoso layout design. Reply

    Your question isn't that clear, since I don't understand what you mean by "a select layer". The one thing I will say (and maybe this will answer your question) is that if you're in an "n-well" process, then you have a p-substrate and hence you don't (normally) need p-wells (exception is if you have some kind of twin-well or triple-well process). 

    But I'm only guessing what you really mean - so maybe you can clarify your question?

    Regards,

    Andrew.

    • Post Points: 20
  • Mon, Oct 14 2013 10:22 AM

    • bjstroll
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    • Posts 5
    • Points 85
    Re: Fabrication issue in Virtuoso layout design. Reply

    Hi Andrew, this is a simple nMOS (in the left) with a ptub next to it. We can see that n-active area is surrounded by a green rectangle which is n-select layer, and p-active is surrounded by an orange rectangle which is p-select layer. That's what I mean.

    • Post Points: 20
  • Mon, Oct 14 2013 10:28 AM

    Re: Fabrication issue in Virtuoso layout design. Reply

    OK, so you're talking about "p implant" or "n implant" (sometimes called pplus or nplus). Fair enough - you have a layer to define the implant that's used on the diffusion opening (or active area).

    You typically have a layer to define nwell (or pwell, depending on the type of substrate). I don't see why you'd need two layers to describe that? So I still don't really understand your question. If your transistor is used on a p-substrate, there's no need to draw a well around an nmos transistor (but there would be around a pmos transistor).

    Note that this is nothing to do with Virtuoso at all - it's to do with how the technology has been set up and what mask layers you actually need for manufacture.

    Regards,

    Andrew.

    • Post Points: 20
  • Mon, Oct 14 2013 10:39 AM

    • bjstroll
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    Re: Fabrication issue in Virtuoso layout design. Reply
    Yes, I am just curious about the fabrication process. What confuse me is that, you see the "implant" layer is a little bit larger than "active" layer, which I think it is because we need to choose a wider window when we implant impurities to ensure that we will completely dope the active area. So if we are using twin-tub process, is there any chance that we need similar a little larger "implant" layer for n-well and p-well, and these "implant" layers also follow certain design rules (like can not overlap between each other)?
    • Post Points: 20
  • Tue, Oct 22 2013 8:51 PM

    • kenambo
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    Re: Fabrication issue in Virtuoso layout design. Reply

     Hi stroll,

    Actually the well layer is sufficiently larger to accomadate all implants.. and these wells(if twintub) are seperated enough by FOX layer and of course these wells must be seperated to avoid undesirable current injection.. These wells ofcourse fabricated on any substrate (n or p).

    Precisely, they dont overlap..

     Regards,

    Ken

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    • Post Points: 20
  • Thu, Oct 24 2013 9:22 AM

    • bjstroll
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    Re: Fabrication issue in Virtuoso layout design. Reply
    Alright, I think I know what's your meaning~ Thanks a lot!
    • Post Points: 5
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Started by bjstroll at 13 Oct 2013 06:03 PM. Topic has 6 replies.