Check out the "SCALD to HDL Evolution Guide" in the Help Documentation which explains the process on getting a SCALD Schematic converted to HDL Schematic.
It has been a while since I did the SCALD conversion but I don't remember it requiring any special licenses.
NOTE: SCALD wasn't available on Windows so it was required to run the conversion on Cadence 14.2 (UNIX) where SCALD/Translator was available.
As far as it being accurate, I only had a couple issues that I needed to troubleshoot but I was able to successfully convert the SCALD Schematic to HDL. Your conversion may run perfectly without any modification or you may run into other issues that I didn't run into once the conversion is completed so I would allocate some time to troubleshoot any issues that may arise.
Here are the couple of the issues that I ran into:
1.) Text Macro Strings were used to drive the lower level Ref Des. Upper Block Attribute value
required \PARAM or \PARAMETER at the end of the value for it to work. If not a null character
was used whichcaused duplicate Ref Des during packaging. Somewhat simple update.
2.) Mergebody (Merge Parts): Errors seen when saving HDL Schematic or Packaging:
a.) Multiple levels of Merge parts were used to merge connections into Buses.
Sch Update: The wires required assigned Net Name on both sides of Bus Merge Part.
b.) Some schematic symbols were using Vector pins that were connected to Merge Parts
which were causing Net Width mismatch on each side of the merge body.
Sch Update: Block Symbol was changed to flatten vector pins to individual scalar pins to
minimize the schematic impact.
If possible, try to find the Allegro .brd database that has been sync'd to the SCALD Schematic so you can verify the connectivity by loading the packager files generated from the HDL Schematic.
There may be other resources out there to perform the conversion but at that time I used what was available with the Cadence software back then.
Hope this helps and Good Luck.