I grabbed the verilog modules and replace some of verilog modules with veriog A and some with cadence schematic
I hope you included disciplines.vams file in your verilog-A module.
To run the simulation We need,
-> analog control file which specifies the type of analysis,time,simulator options etc.
Ex: tran tran stop=3.5m
We can pass this file through command line.
irun *.vams -analogcontrol sim_control.scs
I hope this helps.