I am new to cadence and verilog-AMS i am trying to design ADC circuit completely in verilog-AMS description.
i have a doubt that whether we can attach technology file(65nm or 180nm) to this design codes and get the power consumption of the circuit .if any one says yes we can then tell me how to attach the technology file and get the power data
I am using virtuoso dfII environment (IC6.150
i am sorry if i have posted in the wrong forum
thank you in advance for any help