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 Enterprise Planner support system verilog / uvm ?  

Last post Mon, Aug 12 2013 1:21 AM by StephenH. 1 replies.
Started by MangeshT 10 Aug 2013 04:28 AM. Topic has 1 replies and 770 views
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  • Sat, Aug 10 2013 4:28 AM

    • MangeshT
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    • Joined on Fri, Aug 9 2013
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    Enterprise Planner support system verilog / uvm ? Reply

    Does Enterprise planner supports importing of SV- UVM testbench? I am refering to Getting started document. It mentions of capability to import e testbench.

    Ref

    Incisive® Enterprise Planner
    Getting Started
    Product Version 12.1

    Page 13

     

    • Post Points: 20
  • Mon, Aug 12 2013 1:21 AM

    • StephenH
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    • Bristol, Avon
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    Re: Enterprise Planner support system verilog / uvm ? Reply

    Hi MangeshT

    Enterprise planner supports SV, SystemC and e functional coverage, as well as code coverage. I think you're looking at an old bit of documentation, as the preferred method is not to read in the testbench code. Instead you start the ncsim simulator once, with coverage enabled, causing it to dump a coverage file. Ideally use the -write_metrics switch to the simulator, and it will write a VSOF file, which you can import to enterprise planner and also to enterprise manager. The planner uses this to show you the implemented coverage so you can map it to the vplan.

    Hope this helps.

    Steve Hobbs / Applications Engineer / Cadence Functional Verification
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    • Post Points: 5
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Started by MangeshT at 10 Aug 2013 04:28 AM. Topic has 1 replies.