Unfortunately the answer is "It depends".
If you are intimate with the circuit you should be able to anticipate the module guide and hence the macro placement based on your knowledge of the data flow.
If the circuit is completely foreign, you have a lot of research ahead of you.
Just to get a plausible start point I generally begin with the EDI automatic floorplan commands planDesign , setPlanDesignMode and multiPlanDesign.
Good documentation under / doc / soceUG / Creating An Initial Floorplan Using Automatic Floorplan Synthesis.html.
You will notice that planDesign generally places macros toward the periphery, a valid technique because it leaves the central core area free for standard cells.
If you have hundreds of macros you are going to need the relative floorplan menu "define array constraints" to simplify your macro positioning.
The overall strategy also depends on how many routing layers you have to get over top the macros, if you are forced to go around, congestion is going to be problem.
The fewer the number of routing layers the closer to the edge they belong.
With 8-10 interconnect layers your options open up, IF the macro connected standard cells naturally gravitate toward the center the associated macro can also be drawn closer to the center .
It Is going to take time to get right.
Another trick of the trade is to use trialRoute -noDetour during your floor planning exercise, if you can solve the congestion problem with low effort routing the final route is going to be easy.