Thanks for your quick reply.
Indeed I cannot run Ultrasim in 64bit mode.
Below is the message I get:
Connecting to License Server ... Done.
Error found by UltraSim.
ERROR (USIM-12701): The UltraSim-Verimix (mixed mode) simulator option is
not compatible with 64-bit platforms. The UltraSim simulator will exit
the current session. Either run the simulation on a 32-bit platform or
turn off the UltraSim-Verimix option before running the simulation
$ uname -m
$ echo $CDS_AUTO_64BIT
Could it be a problem of the LD_LIBRARY_PATH?
This library is not set up with the new .cds_t_cshrc that configs the environment of
all cadence tools.
$ echo $LD_LIBRARY_PATH
I chose to use ultrasim and spectreVerilog as simulation tool because I have aTOd and dTOa units around the inputs - aoutputs of the
main chip. So I simulate giving as input a verilog testbench.
Can I do this with ams? (I am in trying to build a stimulus file for ams)
Can I assign value to bus with ams?
Thanks for your concern,