Thanks much Andrew. The three-terminal models are provided by _discrete_ power DMOS manufacturers. For example, IR, Vishay Siliconix, and Fairchild all provide three-terminal models, and I would guess that most of the rest do as well. Of course, the models were intended for use by PCB-level designers who wouldn't be Virtuoso customers, but it is common for _IC_ designers to perform simulations using the external models to better predict how a power controller IC design will perform with actual, commercially available transistors. Again, not a big deal to copy the analogLib component and edit it, but it just seemed like an opportunity to use the standard library transistor symbols provided by Cadence, for which I have never, ever had a need before. As I mentioned, most IC designers work from other libraries so I'm guessing that the "nmos" and "nmos4" cells are used by a very small segment of your customer base. If you provided a three-terminal cell, it might get some use from your power conversion customers, along with any other users whose ICs work with discrete transistors. Those combined comprise a small, but not insignificant segment of the IC tool market.
Thanks again Andrew. Your posts serve as an educational resource to us all.