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 IFV assertion failure 

Last post Mon, Apr 8 2013 2:12 AM by StephenH. 2 replies.
Started by Kris4Rad 01 Apr 2013 01:17 AM. Topic has 2 replies and 845 views
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  • Mon, Apr 1 2013 1:17 AM

    • Kris4Rad
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    • Joined on Mon, Apr 1 2013
    • Posts 2
    • Points 40
    IFV assertion failure Reply

    While running an IFV assertion check, the trace and trigger are showing the status "Pass" whereas the result is shown as "Fail".

     Please tell me where the issue could be?

     

    • Post Points: 35
  • Mon, Apr 1 2013 1:23 AM

    • maheshs
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    • Joined on Fri, Aug 7 2009
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    • Points 15
    Re: IFV assertion failure Reply

    Hi, it seems the failure came from design itself. Please open CEX of the failed assertion and is should be able to show you why assertion failed. You can then debug the RTL logic accordingly.

     

    Thanks

    Mahesh Soni 

    • Post Points: 5
  • Mon, Apr 8 2013 2:12 AM

    • StephenH
    • Top 25 Contributor
    • Joined on Tue, Sep 2 2008
    • Bristol, Avon
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    Re: IFV assertion failure Reply

    Trace and Trigger pass means that the tool was able to find at least one way to trigger the check and to complete the check. Basically these are coverage, telling you that the assertion hasn't passed vacuously.

    It's perfectly natural to have trace and trigger passing with a failing assertion, you should only worry about these if you get an assertion pass when the trigger or trace are failing.

    Steve Hobbs / Applications Engineer / Cadence Functional Verification
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    • Post Points: 5
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Started by Kris4Rad at 01 Apr 2013 01:17 AM. Topic has 2 replies.