Home > Community > Forums > Custom IC Design > How to force VSR using Via Variants


* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

 How to force VSR using Via Variants 

Last post Wed, Apr 3 2013 4:46 AM by Kristof38. 2 replies.
Started by Kristof38 28 Mar 2013 07:19 AM. Topic has 2 replies and 806 views
Page 1 of 1 (3 items)
Sort Posts:
  • Thu, Mar 28 2013 7:19 AM

    • Kristof38
    • Not Ranked
    • Joined on Fri, Nov 9 2012
    • Gières, Isere
    • Posts 2
    • Points 25
    How to force VSR using Via Variants Reply

    Hello community,

     I am trying to route a layout with VSR and I want it to use my customized vias instead of the standard ones which cause too many DRC jog errors.

    Despite my overloaded constraints (see snapshot attached), VSR keeps placing its standard vias instead of mine.

     Is there anyone kind enough to have a look at my below routing tcl script?



    Virtuoso version: virtuoso- -64

     TCL Routing Script:

     # **********************************
    # * RDE Sequencer Generated Script *
    # **********************************

    # ************************************
    # *      Initialize Step            *
    # ************************************
    source /usr/pack/cds-ic-
    setvar db.user_namespace cdba
    setvar db.allow_pin_to_pin_space_checking true
    setvar db.save_empty_nets true
    setvar db.load_lef_props false
    setvar db.check_constraints_basics true
    setvar db.connect_IO_pin_shapes true
    setvar db.paths_as_routes false
    setvar db.clearance_based_zoning false
    setvar db.make_prboundary_blockage true
    setvar db.save_topological_guides_only true
    setvar db.zone_unplaced_instances false
    setvar db.default_rule_spec_name Christophe_WA_Net
    set libName  "cmg_try"
    set cellName "comp_bist_eng_DAC_2v_4v"
    set viewName layout
    virtuoso_setup_default_rulespec -lib $libName -cell $cellName -view $viewName
    set result [ read_db -lib $libName -cell $cellName -view $viewName -mode "a" -design_type devicelevel ]
    if { $result == "oa:0" } {
        return false
    set singleNets [ ::rdeScript::GetSingleNets ]
    if { $::rdeScript::excludeSet != "" } {
        set singleNets [ not_sets -set1 $singleNets -set2 $::rdeScript::excludeSet ]
    ::rdeScript::SetWorkingSet $singleNets
    set workingSet [ ::rdeScript::GetWorkingSet ]
    set ::rdeScript::lockSet [ create_set ]
    set ::rdeScript::lockSet [or_sets -set1 $::rdeScript::lockSet -set2 [find_net  -net_type { power ground }]]
    set ::rdeScript::lockSet [or_sets -set1 $::rdeScript::lockSet -set2 [find_net  -net_type { clock }]]
    set ::rdeScript::gotLockSet trueTaper
    set_route_fix_status -set $::rdeScript::lockSet -status fixed -keep_existing_locked_or_fixed_status true
    set_default_constraint_group -group Christophe_WA_Net
    set_routespec_taper -taper_route_spec Christophe_WA_Taper

    set_route_on_grid -on_grid false
    set bottomRoutingLayer M1
    set topRoutingLayer M3
    set routingLayers [get_layers -material { metal poly } -routing true]
    if { [lsearch -exact $routingLayers $bottomRoutingLayer] > [lsearch -exact $routingLayers $topRoutingLayer] } {
      set tempRoutingLayer M1
      set bottomRoutingLayer M3
      set topRoutingLayer $tempRoutingLayer
    set limitRoutingLayers [lrange $routingLayers [lsearch -exact $routingLayers $bottomRoutingLayer]\
    [lsearch -exact $routingLayers $topRoutingLayer]]
    ::rdeScript::SetLimitRoutingLayers $limitRoutingLayers
    # Special blockage treatment is disabled
    set cutClassNames [get_cut_class_names -lib $libName -cell $cellName -view $viewName]
    #create_derived_vias -cut_layers existing -replace stdVias -std_via_def true -silent
    #foreach cutClass $cutClassNames {
    #    create_derived_vias -cut_layers existing -cut_class_names $cutClass -std_via_def true -cut_rows 1 -cut_columns 1 -silent

    puts "Running extraction"
    extract_net_connectivity -start_level 1 -stop_level 32 -flatten_to_depth 2 -apply_pin_style_to_top_cell -flatten_all_lpps -extract_poly true

    update_net_connectivity -set $workingSet

    # ************************************
    # *      Detail Route Step           *
    # ************************************
    set workingSet [ ::rdeScript::GetWorkingSet ]
    setvar droute.snap_to_pin_center false
    setvar droute.device_pattern 0
    setvar droute.complete_all_guides false
    setvar droute.punch_effective_shapes true
    set drouteCommand "detail_route -dynamic_check_level 3 -check_level 3 -exclude_type { clock power ground }"
    set spaceChar " "
    set drouteCommand [ concat $drouteCommand $spaceChar [format "-set %s" $workingSet] ]
    puts "Running detail route as $drouteCommand"
    eval $drouteCommand

    # **********************************
    # *      Refinement Step           *
    # **********************************
    set workingSet [::rdeScript::GetWorkingSet ]
    set searchAndRepairCmd "search_and_repair -close_opens -exclude_type { clock power ground }"
    set spaceChar " "
    set searchAndRepairCmd [ concat $searchAndRepairCmd $spaceChar [format "-set %s" $workingSet] ]
    puts "Doing search and repair"
    eval $searchAndRepairCmd
    set routeOptimizeCmd "route_optimize -truncate_at_pins true"
    set spaceChar " "
    set routeOptimizeCmd [ concat $routeOptimizeCmd $spaceChar [format "-set %s" $workingSet] ]
    puts "Doing route optimize"
    eval $routeOptimizeCmd
    set adjustViasCmd "adjust_vias -offset_via true -minarea -edgelength -numcuts"
    set spaceChar " "
    set adjustViasCmd [ concat $adjustViasCmd $spaceChar [format "-set %s" $workingSet] ]
    puts "Adjusting vias"
    eval $adjustViasCmd
    set spaceChar " "
    set fixErrorsCmd [concat fix_errors -error_types \{ minarea minedge minenclosed minwidth numcut \}   [format "-set %s" $workingSet] ]
    puts "Fixing errors"
    eval $fixErrorsCmd
    set routeOptimizeCmd "route_optimize -maximize_cuts useMaxRule -max_iterations 0 -V false"
    set spaceChar " "
    set routeOptimizeCmd [ concat $routeOptimizeCmd $spaceChar [format "-set %s" $workingSet] ]
    puts "Doing final route optimize"
    eval $routeOptimizeCmd
    puts "checkpointing the design after refinement"
    set ::rdeScript::didSaveOrCheckpoint true

    # *************************
    # *      Finalize         *
    # *************************
    puts "checkpointing the design after finalize"
    set ::rdeScript::didSaveOrCheckpoint true
    close_db -no_prompt

    constraints snapshot:

    Filed under:
    • Post Points: 20
  • Tue, Apr 2 2013 1:03 AM

    • ColinSutlieff
    • Top 500 Contributor
    • Joined on Tue, Apr 21 2009
    • Feldkirchen, Bavaria
    • Posts 35
    • Points 700
    Re: How to force VSR using Via Variants Reply

    Hi Christophe,

    Before I answer the via variant question I would like to say that this is not normally necessary.

    VSR can fix any jog errors if the DRC information is in the tech file.

    You did not mention how you found the DRC errors. If you used an external checker, it is possible that the rules are not part of the Cadence tech lib. VSR uses the rules in the techlib.

    An easy way to find out is to simply use the DRD batch checker.

    Click verify->design and click the check box "process rules"

    If the batch checker found the DRC errors then there must be a problem with the router sequencer setup.

    Make sure that the option "Minimum Edge Length" is checked in the Refinement step (click the edit button in the sequencer.

    If the checker found no errors then it is a problem with your PDK. The design rules are not sufficiently defined. Either contact your PDK provider or add the missing rules to your Constraint Group.


    Back to your original question:

    I just tested this out with the latest release ( IC6.1.5 ISR 16) and everything worked.

    Perhaps you can try to get access to the latest release.

    Also, your screenshot shows the rules for the Wire Assistant.

    It looks like you created a Constraint Group from the Wire Assistant and then used this C.G as input to the router.

    I would double-check by opening the Process-rule Editor (from the Constraint Manager) and making sure that the via variants are listed in the valid vias section

    So I would try to find out the cause of the DRC errors because VSR should be able to handle this.


    Hope this helps



    • Post Points: 20
  • Wed, Apr 3 2013 4:46 AM

    • Kristof38
    • Not Ranked
    • Joined on Fri, Nov 9 2012
    • Gières, Isere
    • Posts 2
    • Points 25
    Re: How to force VSR using Via Variants Reply


    Thanks for your reply. I will try out what you advised. 


    • Post Points: 5
Page 1 of 1 (3 items)
Sort Posts:
Started by Kristof38 at 28 Mar 2013 07:19 AM. Topic has 2 replies.