I have a problem with some paracitics in a circuit.
To find the Problem I want to simulate single parts of my design as extractec views some thers with the schematic view to exclude the parts one by one from my assumption where the error results from
I did a netset on some hierarcy level of my design on vdd vss and gnd. so how do I have to setup the reference node for qrc extraction to do this simulation correctly?
Does this reference node together with a netset influence my simulation?