Home > Community > Forums > RF Design > Issue with Flicker phase noise simulaiton with PSS+Pnoise in cadence

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

 Issue with Flicker phase noise simulaiton with PSS+Pnoise in cadence  

Last post Tue, Jan 22 2013 2:01 AM by lraf. 2 replies.
Started by lraf 21 Jan 2013 06:27 AM. Topic has 2 replies.
Page 1 of 1 (3 items)
Sort Posts:
  • Mon, Jan 21 2013 6:27 AM

    • lraf
    • Not Ranked
    • Joined on Mon, Mar 8 2010
    • Posts 7
    • Points 145
    Issue with Flicker phase noise simulaiton with PSS+Pnoise in cadence Reply

    I have a problem with Flicker phase noise of a quartz crystal oscillator (RLC equivalent cirucit + opamp current amplifier + opamp inverter) simulated with PSS + Pnoise of CADENCE:

    Indeed I simulate the phase noise of a quartz crystal oscillator and I include only Flicker noise (verilogA) in the feedback opamp inverter. The simulated phase noise shows white phase noise, f-2 phase noise and f-3 phase noise near the carrier, instead of only f-1 phase noise and f-3 phase noise!

    Can you please help me solve this problem?

    Best regards

    Raphael

    • Post Points: 20
  • Tue, Jan 22 2013 12:29 AM

    Re: Issue with Flicker phase noise simulaiton with PSS+Pnoise in cadence Reply
    It would help to see your veriloga model and the input.scs that you are simulating. Much easier than trying to guess what you've done.

    Thanks,
    Andrew
    • Post Points: 20
  • Tue, Jan 22 2013 2:01 AM

    • lraf
    • Not Ranked
    • Joined on Mon, Mar 8 2010
    • Posts 7
    • Points 145
    Re: Issue with Flicker phase noise simulaiton with PSS+Pnoise in cadence Reply

     Dear andrew,

    Thank you for your prompt answer!

    Please find attached to this post:

    the input.scs file, the verilogA model of noise, and the simulations results: transient, noise, PSS, Pnoise and noise summary for phase noise.

    The Phase noise and its associated noise summary show that there is only Flicker noise contribution to phase noise but there is still 0 slope phase noise and 1/f2 slope phase noise whereas there should be only 1/f slope and 1/f3 slope phase noise !

    I hope you have enough informations..

    Thanks

    Raphael

     SCHEMATIC:

      NOISE MODEL (VERILOGA):

     

     

      DESIGN VARIABLES:

     

      INPUT.SCS:

     // Generated for: spectre
    // Generated on: Jan 22 10:36:50 2013
    // Design library name: raphael
    // Design cell name: oscillateur_diodes
    // Design view name: schematic
    simulator lang=spectre
    global 0
    parameters number_harmonics=20 F=59k max_sideband=20 bruit_blanc=0 \
        bruit_flicker=1u ipulse=100n tstab=50m
    include "/home/levy/data/librairie_raf/spice/pmbf4393"
    include "/home/levy/data/librairie_raf/spice/1N4500"

    // Library name: raphael
    // Cell name: oscillateur_diodes
    // View name: schematic
    R7 (net02 ACout) resistor r=1k isnoisy=no
    R6 (CAGout net02) resistor r=10k isnoisy=no
    R16 (net3 net13) resistor r=40e6 isnoisy=no
    R13 (ACout net3) resistor r=50e6 isnoisy=no
    I14 (CAGout net02) 1N4500
    I13 (net02 CAGout) 1N4500
    I15 (ACout net15 net3 V\+ V\-) opamp gain=1e+06 pole_freq=1e+07 \
            rin=1.2e+07 rout=10 ibias=0 vin_offset=0 noise=0
    I12 (CAGout 0 net02 V\+ V\-) opamp gain=1e+06 pole_freq=1e+07 rin=1.2e+07 \
            rout=10 ibias=0 vin_offset=0 noise=0
    I41 (0 net15) generateur_bruit noise_generator=bruit_blanc \
            flicker=bruit_flicker
    I37 (0 net3) isource type=pulse val0=0 val1=ipulse delay=10u rise=1n \
            fall=1n width=10u
    L1 (net13 net12) inductor l=130.0K isnoisy=no
    C6 (net12 CAGout) capacitor c=55.0a
    V1 (V\+ 0) vsource dc=8 type=dc
    V0 (V\- 0) vsource dc=-8 type=dc
    simulatorOptions options reltol=1e-7 vabstol=1e-10 iabstol=1e-13 temp=27 \
        tnom=27 homotopy=all limit=delta scalem=1.0 scale=1.0 \
        compatible=spice2 gmin=1e-12 rforce=1 maxnotes=5 maxwarns=5 digits=5 \
        cols=80 pivrel=1e-3 sensfile="../psf/sens.output" checklimitdest=psf
    pss  (  ACout  0  )  pss  fund=F  harms=number_harmonics
    +    errpreset=moderate  tstab=tstab  tstabmethod=gear2only
    +    annotate=status
    pnoise  (  ACout  0  )  pnoise  sweeptype=relative  relharmnum=1
    +       start=1e-8  stop=1e8  dec=5  maxsideband=max_sideband
    +       augmented=yes  annotate=status  saveallsidebands=yes  lorentzian=no
    +       ppv=yes
    noise ( ACout 0 ) noise start=1e-9 stop=1e6 annotate=status
    designParamVals info what=parameters where=rawfile
    primitives info what=primitives where=rawfile
    subckts info what=subckts  where=rawfile
    saveOptions options save=allpub
    ahdl_include "/data/levy/librairie_raf/resonateurAMS/opamp_MW/veriloga/veriloga.va"
    ahdl_include "/data/levy/librairie_raf/resonateurAMS/generateur_bruit/veriloga/veriloga.va"

     TRANSIENT:

     

     

    NOISE:

     

     

    PSS:

     

     

     PNOISE:

     

     

      NOISE SUMMARY:

     

     

     

     

    • Post Points: 5
Page 1 of 1 (3 items)
Sort Posts:
Started by lraf at 21 Jan 2013 06:27 AM. Topic has 2 replies.