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 Mixed-Signal simulations on FPGA using batch file 

Last post Mon, Jan 14 2013 5:10 AM by Andrew Beckett. 1 replies.
Started by aliasnikhil 08 Jan 2013 09:43 PM. Topic has 1 replies and 440 views
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  • Tue, Jan 8 2013 9:43 PM

    • aliasnikhil
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    • Joined on Wed, Jan 9 2013
    • Los Angeles, CA
    • Posts 6
    • Points 105
    Mixed-Signal simulations on FPGA using batch file Reply

    Hi,

    I am trying to design an ADC simulation on Cadence but my professor says that I can simulate the analog portion on Cadence and then output the simulation values in a batch file. Using the values in the batch file as inputs to the FPGA (Xilinx Virtex-6), which has the rest of the digital circuit of the ADC, I can make it work. Is this possible? Can anyone provide me links to sources where I can read more on this? Any help would be appreciated. 

     Thanks! 

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    • Post Points: 20
  • Mon, Jan 14 2013 5:10 AM

    Re: Mixed-Signal simulations on FPGA using batch file Reply

    Probably - it depends on what inputs you'd need into the FPGA simulation system. You can run an analog simulation in spectre or APS, and then ViVA provides means to export results into (say) comma-separated value files. Whether this is useful to you depends on the complete flow.

    The alternative is that you simulate both parts of the design together in AMS Designer.

    Regards,

    Andrew.

    • Post Points: 5
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Started by aliasnikhil at 08 Jan 2013 09:43 PM. Topic has 1 replies.