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 import cdl file in schematic 

Last post Sat, Nov 17 2012 11:04 AM by Andrew Beckett. 7 replies.
Started by benao 11 Nov 2012 11:06 PM. Topic has 7 replies and 2745 views
Page 1 of 1 (8 items)
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  • Sun, Nov 11 2012 11:06 PM

    • benao
    • Not Ranked
    • Joined on Sun, Apr 29 2012
    • Posts 10
    • Points 185
    import cdl file in schematic Reply

    I would like to import cdl file but i have problem. What is the map file? How I can to import cdl file?    

    • Post Points: 20
  • Mon, Nov 12 2012 1:55 AM

    Re: import cdl file in schematic Reply

    Did you try reading the documentation? This is definitely covered there...

    Andrew

    • Post Points: 20
  • Mon, Nov 12 2012 2:44 AM

    • benao
    • Not Ranked
    • Joined on Sun, Apr 29 2012
    • Posts 10
    • Points 185
    Re: import cdl file in schematic Reply

     As understood map file writen in tcl.

    • Post Points: 20
  • Mon, Nov 12 2012 3:02 AM

    Re: import cdl file in schematic Reply

    No, it's not Tcl. Where does it say that in the documentation?

    Andrew.

    • Post Points: 20
  • Mon, Nov 12 2012 3:11 AM

    • benao
    • Not Ranked
    • Joined on Sun, Apr 29 2012
    • Posts 10
    • Points 185
    Re: import cdl file in schematic Reply

    I unfortunately can not find the documentation. Although I thought that I should prescribe the MAP towards PDK.

    • Post Points: 20
  • Mon, Nov 12 2012 3:18 AM

    Re: import cdl file in schematic Reply

    In IC61X you can do File->Import->SPICE and then hit the Help button on the form. Or you can run "cdnshelp" and then go to Virtuoso Layout Suite->Design Data Translator's Reference. In IC5141 in "cdsdoc" it is at Virtuoso Layout Editor->Design Data Translator's Reference.

    Or <ICinstDir>/doc/transref/transref.pdf or <ICinstDir>/doc/transrefOA/transrefOA.pdf (depending on the version you're using; you didn't say).

    Andrew.

    • Post Points: 20
  • Tue, Nov 13 2012 3:41 AM

    • benao
    • Not Ranked
    • Joined on Sun, Apr 29 2012
    • Posts 10
    • Points 185
    Re: import cdl file in schematic Reply

     Hello, Andrew!

     I wrote map file, but i have error. Please, I need help.

    map.in

    **********************************************

    devMap := nfet nsvt25
    propMatch := subType NM
    termMap := D D G G S S B B
    propMap := W W L L
    addProp := model nsvt25

    devMap := pfet psvt25
    propMatch := subType PM
    termMap := D D G G S S B B
    propMap := W W L L
    addProp := model psvt25

    devMap := capacitor cpo25nw
    termMap := PLUS PLUS MINUS MINUS
    propMap := c c
    addProp := model cpo25nw

    devMap := phyres rpporpo
    termMap := PLUS PLUS MINUS MINUS SUB BULK
    propMap := r res w w l l
    addProp := model rpporpo

    devMap := diode ddnwpw
    termMap := PLUS PLUS MINUS MINUS


    devMap := diode dnsvt25
    termMap := PLUS PLUS MINUS MINUS


    devMap := pnp pnps25
    termMap := E E C C B B
    propMap := earea w w l l
    addProp := model pnps25

    ****************************************************

    ni.log


    ############################################
    MOS Instance: MM0
    #####################################

    ...Searching for a valid mapping in the dev-map file...
            ...did not find a valid mapping.
    Searching for the master cellview pfet->symbol in ref libs...
        ...in cmos090: Did not find pfet->symbol.
        ...in BG_test: Did not find pfet->symbol.

    Created master cellview: mos->symbol in target library BG_test.
    instName->'MM0' is created.
    propName->'m'; propVal->'1' is created.
    Usage error.
    MBER OF ELEMENT BOXES DEFINED     :     2

      CIRCUIT FILE INPUT AND PROCESSED
    *WARNING* '/workarea/otd21/users/abelavin/h10/IPs/BG1V2_25_C90LP/verilog/cds.lib', Line 4: Cannot find file '$CDS_INST_DIR/tools/inca/files/cds.lib'.
    *WARNING* '/workarea/otd21/users/abelavin/h10/IPs/BG1V2_25_C90LP/verilog/cds.lib', Line 4: Skipping: '$CDS_INST_DIR/tools/inca/files/cds.lib'
    *WARNING* LIB cmos090 from File /workarea/otd21/users/abelavin/h10/IPs/BG1V2_25_C90LP/verilog/cds.lib Line 12 redefines
    LIB cmos090 from File /workarea/Libraries/release/HCMOS10LP/PDK_v1b/cadence/cds.lib
    Insert UNDEFINE cmos090
    before DEFINE cmos090
        in /workarea/otd21/users/abelavin/h10/IPs/BG1V2_25_C90LP/verilog/cds.lib
    Or remove or comment out DEFINE cmos090
        in /workarea/Libraries/release/HCMOS10LP/PDK_v1b/cadence/cds.lib
    to suppress this warning message.
    *WARNING* The directory: '/workarea/otd21/users/abelavin/h10/IPs/BG1V2_25_C90LP/gds/gds' does not exist
        but was defined in libFile '/workarea/otd21/users/abelavin/h10/IPs/BG1V2_25_C90LP/verilog/cds.lib' for Lib 'gds'.
    *WARNING* The directory: '/workarea/Libraries/release/HCMOS10LP/IO90LPHVT_ESDKIT_50A/cadence/IO90LPHVT_ESDKIT_50A' does not exist
        but was defined in libFile '/workarea/Libraries/release/HCMOS10LP/cds.lib' for Lib 'IO90LPHVT_ESDKIT_50A'.
    *WARNING* The directory: '/workarea/Libraries/release/HCMOS10LP/IO90_BUMP_7M2T/cadence/IO90_BUMP_7M2T' does not exist
        but was defined in libFile '/workarea/Libraries/release/HCMOS10LP/cds.lib' for Lib 'IO90_BUMP_7M2T'.
    *WARNING* The directory: '/workarea/Libraries/release/HCMOS10LP/SHIFT90CO50A_LS1812/cadence/SHIFT90CO50A_LS1812' does not exist
        but was defined in libFile '/workarea/Libraries/release/HCMOS10LP/cds.lib' for Lib 'SHIFT90CO50A_LS1812'.
    Loading libInit file of library "cmos090" ...
    "   Loading 'cmos090customization.il' ..."
    "   Loading 'callback_common.il' ..."
    "   Loading 'callback_bipolar.il' ..."
    "   Loading 'callback_celemfringe.il' ..."
    "   Loading 'callback_cpolywell.il' ..."
    "   Loading 'callback_diode.il' ..."
    "   Loading 'callback_gatedDiode.il' ..."
    "   Loading 'callback_drift.il' ..."
    "   Loading 'callback_mosfet.il' ..."
    "   Loading 'callback_resistor.il' ..."
    "   Loading 'callback_cfringe.il' ..."
    "   Loading 'callback_cmetal.il' ..."
    "   Loading 'callback_cstack.il' ..."
    "   Loading 'callback_cmim.il' ..."
    "   Loading 'callback_sealring.il' ..."
    "   Loading 'callback_pgtext.il' ..."
    "   Loading 'equation_common.il' ..."
    "   Loading 'equation_cpolywell.il' ..."
    "   Loading 'equation_mosfet.il' ..."
    "   Loading 'equation_resistor.il' ..."
    "   Loading 'equation_cfringe.il' ..."
    "   Loading 'equation_cmetal.il' ..."
    "   Loading 'equation_cstack.il' ..."
    "   Loading 'equation_cmim.il' ..."
    "   Loading 'label.il' ..."
    "   Loading 'netlist.il' ..."
    "   Loading 'param.il' ..."
    "   Loading 'commonPcellProcs.il' ..."
    "   Loading 'commonPlateAndStripeCapProc.il' ..."
    "   Loading 'genericActiveRes.il' ..."
    "   Loading 'genericMetalRes.il' ..."
    "   Loading 'genericMetalPlateCap.il' ..."
    "   Loading 'genericInterRes.il' ..."
    "   Loading 'genericPolyCap.il' ..."
    "   Loading 'genericElemFringeCap.il' ..."
    "   Loading 'genericDiode.il' ..."
    "   Loading 'genericSealring.il' ..."
    "   Loading 'genericTestPoint.il' ..."
    "   Loading 'pgtext_drc_clean_function.il' ..."
    "   Loading 'DKPcellLib.il' ..."
    "   Loading 'genericLayersAndDRs.il' ..."

       Loading technology parameters ...
    *Error* eval: undefined function - fboundp
    *WARNING* : Not found - D

    Reference Libraries...
    cmos090
    BG_test
    ###################################
    ---- Device-mapping enabled ----


    5 subckt(s) found in the netlist file.


    ==========================
        Subckt: BG1V2_H10_DA10HF_ana_inv
    ==========================

    Created the CV BG1V2_H10_DA10HF_ana_inv->netlist_tmp.

    #####################################
        MOS Instance: MM0
    #####################################

    ...Searching for a valid mapping in the dev-map file...
            ...did not find a valid mapping.
    Searching for the master cellview pfet->symbol in ref libs...
        ...in cmos090: Did not find pfet->symbol.
        ...in BG_test: Did not find pfet->symbol.

    Created master cellview: mos->symbol in target library BG_test.
    instName->'MM0' is created.
    propName->'m'; propVal->'1' is created.
    Usage error.
    MBER OF ELEMENT BOXES DEFINED     :     2

      CIRCUIT FILE INPUT AND PROCESSED
    *WARNING* '/workarea/otd21/users/abelavin/h10/IPs/BG1V2_25_C90LP/verilog/cds.lib', Line 4: Cannot find file '$CDS_INST_DIR/tools/inca/files/cds.lib'.
    *WARNING* '/workarea/otd21/users/abelavin/h10/IPs/BG1V2_25_C90LP/verilog/cds.lib', Line 4: Skipping: '$CDS_INST_DIR/tools/inca/files/cds.lib'
    *WARNING* LIB cmos090 from File /workarea/otd21/users/abelavin/h10/IPs/BG1V2_25_C90LP/verilog/cds.lib Line 12 redefines
    LIB cmos090 from File /workarea/Libraries/release/HCMOS10LP/PDK_v1b/cadence/cds.lib
    Insert UNDEFINE cmos090
    before DEFINE cmos090
        in /workarea/otd21/users/abelavin/h10/IPs/BG1V2_25_C90LP/verilog/cds.lib
    Or remove or comment out DEFINE cmos090
        in /workarea/Libraries/release/HCMOS10LP/PDK_v1b/cadence/cds.lib
    to suppress this warning message.
    *WARNING* The directory: '/workarea/otd21/users/abelavin/h10/IPs/BG1V2_25_C90LP/gds/gds' does not exist
        but was defined in libFile '/workarea/otd21/users/abelavin/h10/IPs/BG1V2_25_C90LP/verilog/cds.lib' for Lib 'gds'.
    *WARNING* The directory: '/workarea/Libraries/release/HCMOS10LP/IO90LPHVT_ESDKIT_50A/cadence/IO90LPHVT_ESDKIT_50A' does not exist
        but was defined in libFile '/workarea/Libraries/release/HCMOS10LP/cds.lib' for Lib 'IO90LPHVT_ESDKIT_50A'.
    *WARNING* The directory: '/workarea/Libraries/release/HCMOS10LP/IO90_BUMP_7M2T/cadence/IO90_BUMP_7M2T' does not exist
        but was defined in libFile '/workarea/Libraries/release/HCMOS10LP/cds.lib' for Lib 'IO90_BUMP_7M2T'.
    *WARNING* The directory: '/workarea/Libraries/release/HCMOS10LP/SHIFT90CO50A_LS1812/cadence/SHIFT90CO50A_LS1812' does not exist
        but was defined in libFile '/workarea/Libraries/release/HCMOS10LP/cds.lib' for Lib 'SHIFT90CO50A_LS1812'.
    Loading libInit file of library "cmos090" ...
    "   Loading 'cmos090customization.il' ..."
    "   Loading 'callback_common.il' ..."
    "   Loading 'callback_bipolar.il' ..."
    "   Loading 'callback_celemfringe.il' ..."
    "   Loading 'callback_cpolywell.il' ..."
    "   Loading 'callback_diode.il' ..."
    "   Loading 'callback_gatedDiode.il' ..."
    "   Loading 'callback_drift.il' ..."
    "   Loading 'callback_mosfet.il' ..."
    "   Loading 'callback_resistor.il' ..."
    "   Loading 'callback_cfringe.il' ..."
    "   Loading 'callback_cmetal.il' ..."
    "   Loading 'callback_cstack.il' ..."
    "   Loading 'callback_cmim.il' ..."
    "   Loading 'callback_sealring.il' ..."
    "   Loading 'callback_pgtext.il' ..."
    "   Loading 'equation_common.il' ..."
    "   Loading 'equation_cpolywell.il' ..."
    "   Loading 'equation_mosfet.il' ..."
    "   Loading 'equation_resistor.il' ..."
    "   Loading 'equation_cfringe.il' ..."
    "   Loading 'equation_cmetal.il' ..."
    "   Loading 'equation_cstack.il' ..."
    "   Loading 'equation_cmim.il' ..."
    "   Loading 'label.il' ..."
    "   Loading 'netlist.il' ..."
    "   Loading 'param.il' ..."
    "   Loading 'commonPcellProcs.il' ..."
    "   Loading 'commonPlateAndStripeCapProc.il' ..."
    "   Loading 'genericActiveRes.il' ..."
    "   Loading 'genericMetalRes.il' ..."
    "   Loading 'genericMetalPlateCap.il' ..."
    "   Loading 'genericInterRes.il' ..."
    "   Loading 'genericPolyCap.il' ..."
    "   Loading 'genericElemFringeCap.il' ..."
    "   Loading 'genericDiode.il' ..."
    "   Loading 'genericSealring.il' ..."
    "   Loading 'genericTestPoint.il' ..."
    "   Loading 'pgtext_drc_clean_function.il' ..."
    "   Loading 'DKPcellLib.il' ..."
    "   Loading 'genericLayersAndDRs.il' ..."

       Loading technology parameters ...
    *Error* eval: undefined function - fboundp
    *WARNING* : Not found - D
     

     ni.err


     PROCESSING INPUT FILE: /workarea/otd21/users/abelavin/h10/IPs/BG1V2_25_C90LP/verilog/BG1V2_25_C90LP.cdl
     *** WARNING : *.EQUATION IS NOT SUPPORTED BY CDLIN. IGNORED
         36:MM3 net46 INB AGND AGND nsvt25 w=15.0 l=0.28 nfing=1 sense=0 m=1
     ****SYNTAX ERROR: REAL NUMBER IN LINE     36, AT COLUMN  38, IS SET TO BE 0.0
     *** WARNING : FOR VALUE     280000.0000 AT LINE       36 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
         37:MM2 net060 IN AGND AGND nsvt25 w=15.0 l=0.28 nfing=1 sense=0 m=1
     ****SYNTAX ERROR: REAL NUMBER IN LINE     37, AT COLUMN  38, IS SET TO BE 0.0
     *** WARNING : FOR VALUE     280000.0000 AT LINE       37 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE     900000.0625 AT LINE       44 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE     300000.0000 AT LINE       44 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE     900000.0625 AT LINE       45 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE     300000.0000 AT LINE       45 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE    1000000.0000 AT LINE       46 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE     300000.0000 AT LINE       46 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE    1000000.0000 AT LINE       47 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE     300000.0000 AT LINE       47 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     */W* WARNING ***: NO ELEMENT INSIDE SUBCKT *3         
     */W* WARNING ***: NO ELEMENT INSIDE SUBCKT *4         
        121:MM18 A2 A2 A1 BGVSSA nsvt25 w=100.0 l=0.51 nfing=12 sense=0 m=1
     ****SYNTAX ERROR: REAL NUMBER IN LINE    121, AT COLUMN  36, IS SET TO BE 0.0
     *** WARNING : FOR VALUE     510000.0625 AT LINE      121 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE    1000000.0000 AT LINE      122 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE     350000.0312 AT LINE      122 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE    1000000.0000 AT LINE      123 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE     350000.0312 AT LINE      123 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
        124:MM17 A3 A3 A2 BGVSSA nsvt25 w=100.0 l=0.51 nfing=12 sense=0 m=1
     ****SYNTAX ERROR: REAL NUMBER IN LINE    124, AT COLUMN  36, IS SET TO BE 0.0
     *** WARNING : FOR VALUE     510000.0625 AT LINE      124 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
        125:MM27 D2 B3 D1 B1 nsvt25 w=10.0 l=5.0 nfing=1 sense=6 m=4
     ****SYNTAX ERROR: REAL NUMBER IN LINE    125, AT COLUMN  31, IS SET TO BE 0.0
        125:MM27 D2 B3 D1 B1 nsvt25 w=10.0 l=5.0 nfing=1 sense=6 m=4
     ****SYNTAX ERROR: REAL NUMBER IN LINE    125, AT COLUMN  37, IS SET TO BE 0.0
     *** WARNING : FOR VALUE    1000000.0000 AT LINE      126 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE     350000.0312 AT LINE      126 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE    1000000.0000 AT LINE      127 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE     600000.0000 AT LINE      127 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE    1000000.0000 AT LINE      128 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE     600000.0000 AT LINE      128 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
        129:MM19 B3 A3 A3 BGVSSA nsvt25 w=5.0 l=5.0 nfing=1 sense=0 m=1
     ****SYNTAX ERROR: REAL NUMBER IN LINE    129, AT COLUMN  34, IS SET TO BE 0.0
        129:MM19 B3 A3 A3 BGVSSA nsvt25 w=5.0 l=5.0 nfing=1 sense=0 m=1
     ****SYNTAX ERROR: REAL NUMBER IN LINE    129, AT COLUMN  40, IS SET TO BE 0.0
        130:MM25 B3 B3 B1 B1 nsvt25 w=10.0 l=5.0 nfing=1 sense=6 m=4
     ****SYNTAX ERROR: REAL NUMBER IN LINE    130, AT COLUMN  31, IS SET TO BE 0.0
        130:MM25 B3 B3 B1 B1 nsvt25 w=10.0 l=5.0 nfing=1 sense=6 m=4
     ****SYNTAX ERROR: REAL NUMBER IN LINE    130, AT COLUMN  37, IS SET TO BE 0.0
        131:MM26 net0194 B3 C2 B1 nsvt25 w=10.0 l=5.0 nfing=1 sense=6 m=2
     ****SYNTAX ERROR: REAL NUMBER IN LINE    131, AT COLUMN  36, IS SET TO BE 0.0
        131:MM26 net0194 B3 C2 B1 nsvt25 w=10.0 l=5.0 nfing=1 sense=6 m=2
     ****SYNTAX ERROR: REAL NUMBER IN LINE    131, AT COLUMN  42, IS SET TO BE 0.0
     *** WARNING : FOR VALUE     400000.0000 AT LINE      132 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE     400000.0000 AT LINE      132 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE     400000.0000 AT LINE      133 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE     400000.0000 AT LINE      133 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE    1000000.0000 AT LINE      134 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE     350000.0312 AT LINE      134 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
        135:MM24 D2 D2 BGVCCA BGVCCA psvt25 w=6.65 l=5.0 nfing=1 sense=6 m=4
     ****SYNTAX ERROR: REAL NUMBER IN LINE    135, AT COLUMN  39, IS SET TO BE 0.0
        135:MM24 D2 D2 BGVCCA BGVCCA psvt25 w=6.65 l=5.0 nfing=1 sense=6 m=4
     ****SYNTAX ERROR: REAL NUMBER IN LINE    135, AT COLUMN  45, IS SET TO BE 0.0
     *** WARNING : FOR VALUE    1000000.0000 AT LINE      136 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE     610000.0000 AT LINE      136 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
        137:MM28 BG1 net0194 BGVCCA BGVCCA psvt25 w=6.65 l=5.0 nfing=1 sense=6 m=4
     ****SYNTAX ERROR: REAL NUMBER IN LINE    137, AT COLUMN  45, IS SET TO BE 0.0
        137:MM28 BG1 net0194 BGVCCA BGVCCA psvt25 w=6.65 l=5.0 nfing=1 sense=6 m=4
     ****SYNTAX ERROR: REAL NUMBER IN LINE    137, AT COLUMN  51, IS SET TO BE 0.0
        138:MM29 IPTAT net0194 BGVCCA BGVCCA psvt25 w=6.65 l=5.0 nfing=1 sense=6 m=4
     ****SYNTAX ERROR: REAL NUMBER IN LINE    138, AT COLUMN  47, IS SET TO BE 0.0
        138:MM29 IPTAT net0194 BGVCCA BGVCCA psvt25 w=6.65 l=5.0 nfing=1 sense=6 m=4
     ****SYNTAX ERROR: REAL NUMBER IN LINE    138, AT COLUMN  53, IS SET TO BE 0.0
     *** WARNING : FOR VALUE    1000000.0000 AT LINE      139 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE     610000.0000 AT LINE      139 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE    1000000.0000 AT LINE      140 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE     350000.0312 AT LINE      140 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE     400000.0000 AT LINE      141 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE    2000000.0000 AT LINE      141 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
        142:MM23 C2 net0194 BGVCCA BGVCCA psvt25 w=6.65 l=5.0 nfing=1 sense=6 m=2
     ****SYNTAX ERROR: REAL NUMBER IN LINE    142, AT COLUMN  44, IS SET TO BE 0.0
        142:MM23 C2 net0194 BGVCCA BGVCCA psvt25 w=6.65 l=5.0 nfing=1 sense=6 m=2
     ****SYNTAX ERROR: REAL NUMBER IN LINE    142, AT COLUMN  50, IS SET TO BE 0.0
        143:MM21 B3 net0194 BGVCCA BGVCCA psvt25 w=6.65 l=5.0 nfing=1 sense=6 m=4
     ****SYNTAX ERROR: REAL NUMBER IN LINE    143, AT COLUMN  44, IS SET TO BE 0.0
        143:MM21 B3 net0194 BGVCCA BGVCCA psvt25 w=6.65 l=5.0 nfing=1 sense=6 m=4
     ****SYNTAX ERROR: REAL NUMBER IN LINE    143, AT COLUMN  50, IS SET TO BE 0.0
     *** WARNING : FOR VALUE    1000000.0000 AT LINE      144 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
     *** WARNING : FOR VALUE     350000.0312 AT LINE      144 PRECISION   3 CAN NOT BE PROVIDED.
                   VALIDITY OF THE FIRST 6 DECIMAL DIGITS IS GUARANTEED ONLY.
        145:MM22 net0194 D2 BGVCCA BGVCCA psvt25 w=6.65 l=5.0 nfing=1 sense=6 m=2
     ****SYNTAX ERROR: REAL NUMBER IN LINE    145, AT COLUMN  44, IS SET TO BE 0.0
        145:MM22 net0194 D2 BGVCCA BGVCCA psvt25 w=6.65 l=5.0 nfing=1 sense=6 m=2
     ****SYNTAX ERROR: REAL NUMBER IN LINE    145, AT COLUMN  50, IS SET TO BE 0.0
     *** WARNING : I/O PIN VBG          OF SUBCKT *5           IS NOT CONNECTED INSIDE SUBCKT DEFINITION
     *** WARNING : FLOATING NET: POFFB2V5     IN SUBCKT *5         

      FILE :/workarea/otd21/users/abelavin/h10/IPs/BG1V2_25_C90LP/verilog/BG1V2_25_C90LP.cdl
      *** NUMBER OF ELEMENT BOXES DEFINED     :     2
    ERROR (CDLIN-47): Failed to find the terminal D in the master cell of instance MM0. Provide the
    correct master cell.
     
     

    • Post Points: 20
  • Sat, Nov 17 2012 11:04 AM

    Re: import cdl file in schematic Reply

    It's a bit hard to help out without seeing your CDL netlist or the PDK you're using (I'd probably have to spend some time trying to guess what things look like and inventing my own setup; unfortunately I don't have the time to do that). I suggest logging a service request

    Regards,

    Andrew.

    • Post Points: 5
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Started by benao at 11 Nov 2012 11:06 PM. Topic has 7 replies.