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 Cadence Simulation Calculation Mismatch 

Last post Thu, Jan 3 2013 5:24 AM by xxgenerall. 1 replies.
Started by nevinalex1234 19 Oct 2012 11:07 PM. Topic has 1 replies and 949 views
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  • Fri, Oct 19 2012 11:07 PM

    • nevinalex1234
    • Top 500 Contributor
    • Joined on Wed, Jul 18 2012
    • aluva, Kerala
    • Posts 26
    • Points 430
    Cadence Simulation Calculation Mismatch Reply

    Hi

    i wanted to calculate the effect of load on the output of the inverter. Attached is the experiment setup. Vdd=1.1 and Vgs=0

    So ideally when there is no load, the output is pulled closed to 1.1. (1.099V). That parts fine. Now when i put a load at the output 50 ohm as in Figure

    But the output is only 293mV as by simulation.

    Rup=1/gds=443.45

    Rdown=1/gds=14.27K 

    By calculation it should have been 50/(50+443.45) =101mV

    But as shown in simulation (dc), the node rises to 293mV. Why this discrepancy?

    How do i estimate the resistance of the inverter pair which is being loaded to 50 ohm ? 

    • Post Points: 20
  • Thu, Jan 3 2013 5:24 AM

    • xxgenerall
    • Top 500 Contributor
    • Joined on Wed, Feb 8 2012
    • Nanjing, Jiangsu
    • Posts 28
    • Points 380
    Re: Cadence Simulation Calculation Mismatch Reply

    Hi,

    I think gds is a small-signal parameter, which is obtained from DC Operation Point. However, when doing tran simulation, output is driven by a large signal. Besides, if inverter is directly connected to a 50Ohms load, the DC Operating Point is different with that when no load is present.

     

    • Post Points: 5
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Started by nevinalex1234 at 19 Oct 2012 11:07 PM. Topic has 1 replies.