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 Need help when using the AMS-Ultrasim tools,occuring some problems in Electrical signal to Logical signal connect module 

Last post Mon, Sep 10 2012 6:42 PM by zhangyz. 0 replies.
Started by zhangyz 10 Sep 2012 06:42 PM. Topic has 0 replies and 812 views
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  • Mon, Sep 10 2012 6:42 PM

    • zhangyz
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    • Joined on Tue, Jun 21 2011
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    Need help when using the AMS-Ultrasim tools,occuring some problems in Electrical signal to Logical signal connect module Reply

    Hi,When I use the Ultrsim tools verification the PLL Clock connect to digiatal module, the analog through the connect module(E2L) ,the output logic ignores some toogle edge,How to Solve this problem?

       

    • Post Points: 5
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Started by zhangyz at 10 Sep 2012 06:42 PM. Topic has 0 replies.