Home > Community > Forums > Digital Implementation > Encounter Antenna Diode Cells and Filler Cells causing Short Errors

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

 Encounter Antenna Diode Cells and Filler Cells causing Short Errors 

Last post Thu, Jul 26 2012 9:50 AM by bsparkma. 2 replies.
Started by bsparkma 26 Jul 2012 07:12 AM. Topic has 2 replies and 1950 views
Page 1 of 1 (3 items)
Sort Posts:
  • Thu, Jul 26 2012 7:12 AM

    • bsparkma
    • Not Ranked
    • Joined on Thu, Jul 26 2012
    • Posts 4
    • Points 50
    Encounter Antenna Diode Cells and Filler Cells causing Short Errors Reply

    I am trying to do P&R on a design, but it seems that all of my antenna diodes and filler cells cause short errors to the vdd and gnd rails in Encounter using Verify Geometry after placement.

    The filler cell is only two metal rails in the same locations as our standard cells (labelled correctly for abstract generator) and nwell for continuity. We have multiple sizes of these, and these do not overlap any cells due to our sizing.

    The antenna diode cell is the filler cell with a PMOS with D and S tied to vdd and a NMOS with G and S tied to ground and D to its input for the necessary gate gonnections.

    We are using Abstract Generator to abstract our cells, and no errors are being produced during this process. The abstracts, extracts, and pins views look correct, based on versions of our standard cells. The vdd and gnd pins are showing in the pins view, and they do have the same name as all of our other cells.

    Could something be wrong in the abstract generation, or is there a setting I should use in Encounter to prevent these cells from being checked for these errors?

     

    Thanks,

    Brett 

    • Post Points: 20
  • Thu, Jul 26 2012 8:43 AM

    • Scrivner
    • Top 100 Contributor
    • Joined on Thu, Oct 9 2008
    • Ridgeland, MS
    • Posts 75
    • Points 1,475
    Re: Encounter Antenna Diode Cells and Filler Cells causing Short Errors Reply

     Have you set globalNetConnections to make sure the pwr/gnd pins on the cells are connected to global pwr/gnd?

     

    globalNetConnect vdd -type pgpin -pin vdd -inst * -module {}

    globalNetConnect vss -type pgpin -pin vss -inst * -module {}

    applyGlobalNets

    • Post Points: 20
  • Thu, Jul 26 2012 9:50 AM

    • bsparkma
    • Not Ranked
    • Joined on Thu, Jul 26 2012
    • Posts 4
    • Points 50
    Re: Encounter Antenna Diode Cells and Filler Cells causing Short Errors Reply

    This solved the problem.

    I assumed it would make the proper connectivity because the cells were properly aligned with adjacent cell.

     

    Thanks!

    -Brett

    • Post Points: 5
Page 1 of 1 (3 items)
Sort Posts:
Started by bsparkma at 26 Jul 2012 07:12 AM. Topic has 2 replies.