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 ncverilog simulation overflow 

Last post Mon, Jun 25 2012 9:19 AM by Andrew Beckett. 2 replies.
Started by dzkxybx 24 Jun 2012 09:15 PM. Topic has 2 replies and 1471 views
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  • Sun, Jun 24 2012 9:15 PM

    • dzkxybx
    • Not Ranked
    • Joined on Mon, Jun 25 2012
    • Posts 1
    • Points 20
    ncverilog simulation overflow Reply

    hi,

      i am new here. I have a problem as below when i do my design simulation:

     4038444601 Overflow

    Simulation stopped via $stop(1) at time 40384446008 PS + 2

    how could this happens? thanks!

    and my timescale is 1ns/10ps

     

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    • Post Points: 20
  • Mon, Jun 25 2012 5:18 AM

    • Quek
    • Top 10 Contributor
    • Joined on Wed, Oct 14 2009
    • Singapore, 00-SG
    • Posts 1,051
    • Points 15,990
    Re: ncverilog simulation overflow Reply

    Hi dzkxybx

    From the limited info which you had provided, it is very hard to guess the cause of the problem. If you are not using the latest version of ncverilog, would you please re-try using the latest version and see if the same problem occurs?

    Best regards
    Quek

    • Post Points: 20
  • Mon, Jun 25 2012 9:19 AM

    Re: ncverilog simulation overflow Reply

    The limit for some considerable time has been about 9223 seconds - and you're hitting a limit much less than that. 

    Are you using some prehistoric version of ncverilog? What does "ncverilog -version" say?

    e.g. simulating "ncverilog testmax.v" where testmax.v is:

     `timescale 1ps/1fs

    module top;

    reg a;

    initial a=1;

    always #100000000000 begin
      a=~a;
      $strobe($time,,"a=%b",a);
    end

    endmodule

    Gives:

    ...

         9223368439474176 a=0
        9223369655226368 a=1
    ncsim: *E,TRTOVF: simulated time overflow.
              File: ./testmax.v, line = 9, pos = 7
             Scope: top
              Time: 9223370870978560 PS + 0

    ./testmax.v:9 always #100000000000 begin

    • Post Points: 5
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Started by dzkxybx at 24 Jun 2012 09:15 PM. Topic has 2 replies.