Home > Community > Forums > Custom IC Design > Is it possible to parameterize a Multi Bit wire with vector expressions?

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

 Is it possible to parameterize a Multi Bit wire with vector expressions? 

Last post Fri, Feb 3 2012 5:08 PM by WesZ. 6 replies.
Started by WesZ 01 Feb 2012 03:19 PM. Topic has 6 replies and 3119 views
Page 1 of 1 (7 items)
Sort Posts:
  • Wed, Feb 1 2012 3:19 PM

    • WesZ
    • Not Ranked
    • Joined on Mon, Nov 14 2011
    • Posts 3
    • Points 45
    Is it possible to parameterize a Multi Bit wire with vector expressions? Reply

     Is it possible to parameterize a Multi Bit wire with vector expressions? Also can you parameterize the number of instances in a instance defines with an iterative expressiion? I'm trying to create a schematic that you can reconfigure the number of internal devices via a parameter.

    Filed under: ,
    • Post Points: 20
  • Thu, Feb 2 2012 10:15 AM

    Re: Is it possible to parameterize a Multi Bit wire with vector expressions? Reply

    Your question is not that clear. If you're asking if you can make a wire something like myBus<a:b> where a and b are parameter names, then the answer is no. It's possible to create a schematic pcell to achieve the same thing, but this is normally only used for leaf cells and special cases.

    Similarly you cannot have an iterated instance with parameterized start and stop bits.

    Regards,

    Andrew.

    • Post Points: 20
  • Thu, Feb 2 2012 10:55 AM

    • WesZ
    • Not Ranked
    • Joined on Mon, Nov 14 2011
    • Posts 3
    • Points 45
    Re: Is it possible to parameterize a Multi Bit wire with vector expressions? Reply

    Thanks for your quick reply Andrew.  The reason I was asking this is because I'm trying to find an easy way to place resistors which are segmented in series. Ideally this would be another parameter of the resistor, say 's', which would put serveral units resistors in series similar to the way the m parameter puts them in parallel. Do you know of a clever way of doing in Cadence this without editing the model file directly?

    • Post Points: 20
  • Thu, Feb 2 2012 8:45 PM

    • skillUser
    • Top 10 Contributor
    • Joined on Fri, Sep 19 2008
    • Austin, TX
    • Posts 2,598
    • Points 16,075
    Re: Is it possible to parameterize a Multi Bit wire with vector expressions? Reply

    Hi Wes,

    I wrote some Schematic PCell code for this type of problem a while back, it may not be tested fully!!  Here it is:

    
    /*Description:
    
    Sample PCell code for a schematic and a symbol PCell that is designed
    to be a "wrapper" around an existing cell, in this case the resistor
    from analogLib.
    */
    let( (library cell pcellId)
    library = "CIC_DEMO" ;; put your target library here
    cell = "res" ;; put your new cellname here
    ;; create the schematic
    pcellId = pcDefinePCell(
    list(ddGetObj(library) cell "schematic" "schematic")
    (
    (connType "series")
    (segNum 1)
    )

    let( (cv wrapLib wrapCell wrapView master
    inst1 inst net in out step halfPin)
    cv = pcCellView ;; global variable defined by the system
    wrapLib = "analogLib" ;; put wrapped library here
    wrapCell= "res" ;; put wrapped cellname here
    wrapView= "symbol" ;; put wrapped viewname here
    step = 0.5 ;; a stepping distance parameter
    halfPin = 0.0625 ;; half a pin width/height
    ;; the master is the cell to be wrapped, it will be instantiated
    ;; in this schematic
    master = dbOpenCellViewByType(wrapLib wrapCell wrapView "schematicSymbol")
    ;; create the input and output nets, terminals and pins
    in = dbMakeNet(cv "in")
    out = dbMakeNet(cv "out")
    dbCreateTerm(in in~>name "inputOutput")
    dbCreateTerm(out out~>name "inputOutput")
    dbCreatePin(in
    dbCreatePolygon(cv list("pin" "drawing")
    list(-step:halfPin -step+halfPin:halfPin -step+(halfPin*2):0 -step+halfPin:-halfPin -step:-halfPin)))
    dbCreatePin(out
    dbCreatePolygon(cv list("pin" "drawing")
    list(-step+(2*halfPin):halfPin-step -step+halfPin:halfPin-step -step:-step -step+halfPin:-step-halfPin -step+(2*halfPin):-step-halfPin)))
    ;; create the first instance of the master and connect the
    ;; input pin to the PLUS terminal
    inst1 = dbCreateInst( cv master "I1" 0:0 "R0" )
    dbCreateConnByName(in inst1 "PLUS")
    ;; set inst to be the one we just created, this will get
    ;; overridden in the for loop (if it runs)
    inst = inst1
    ;; for a parallel connection type we can connect MINUS to out
    when(connType == "parallel"
    dbCreateConnByName(out inst "MINUS")
    ) ;; iterate over the number of segments and create a new instance
    ;; of the master for each one. If the connection type is series
    ;; then connect each previous instances' MINUS to the next
    ;; instances' PLUS. If the connection type is parallel then
    ;; connect PLUS to 'in' and MINUS to 'out'. Step each instance
    ;; away from the last: series are stacked vertically, parallel
    ;; are spaced horizontally
    for(conns 2 segNum
    when(connType=="series"
    net = dbMakeNet(cv sprintf(nil "net%d" conns-1))
    dbCreateConnByName(net inst "MINUS")
    )
    inst = dbCreateInst( cv master sprintf(nil "I%d" conns)
    case(connType
    ("series" 0:(conns-1) * -step)
    (t (conns-1)*step:0)
    ) "R0" )
    case(connType
    ("series"
    dbCreateConnByName(net inst "PLUS")
    ) ("parallel"
    dbCreateConnByName(in inst "PLUS")
    dbCreateConnByName(out inst "MINUS")
    ) ) ); for
    dbCreateConnByName(out inst "MINUS")
    dbClose(master)
    ); let
    ); pcDefinePCell
    ;; save the schematic cellview
    dbSave(pcellId)
    dbClose(pcellId)
    ;; create the symbol
    pcellId = pcDefinePCell(
    list(ddGetObj(library) cell "symbol" "schematicSymbol")
    (
    (connType "series")
    (segNum 1)
    )

    let( (cv inFig outFig in out halfPin resHt resWid lh label)
    cv = pcCellView ;; global variable defined by the system
    halfPin = 0.025 ;; half pin size in x or y dimension
    resHt = 0.375 ;; resistor height
    resWid = 0.25 ;; resistor width
    lh = 0.0625 ;; label height
    ;; create the instance selection box
    dbCreateRect(cv list("instance" "drawing")
    list(-resWid/2.0:-resHt resWid/2.0:0))
    ;; create the resistor body and lines to the pins
    dbCreateRect(cv list("device" "drawing")
    list(-halfPin:-halfPin*10 halfPin:-halfPin*5))
    dbCreateLine(cv list("device" "drawing") list(0:-halfPin 0:-halfPin*5))
    dbCreateLine(cv list("device" "drawing")
    list(0:-halfPin*10 0:halfPin-resHt))
    ;; create the pin figures, the nets and terminals
    inFig = dbCreateRect(cv list("pin" "drawing")
    list(-halfPin:-halfPin halfPin:halfPin))
    outFig = dbCreateRect(cv list("pin" "drawing")
    list(-halfPin:-resHt-halfPin halfPin:halfPin-resHt))
    in = dbCreateNet(cv "in")
    out = dbCreateNet(cv "out")
    dbCreateTerm(in in~>name "inputOutput")
    dbCreatePin(in inFig)
    dbCreateTerm(out out~>name "inputOutput")
    dbCreatePin(out outFig)
    ;; create a small label to denote the type and segments
    if(connType=="series" then
    dbCreateLabel(cv list("annotate" "drawing") -resWid/2.0:-lh
    sprintf(nil "s%d" segNum) "upperLeft" "R0" "stick" lh/2.0)
    else
    dbCreateLabel(cv list("annotate" "drawing") -resWid/2.0:-lh
    sprintf(nil "p%d" segNum) "upperLeft" "R0" "stick" lh/2.0)
    )
    ;; create some analog-type information labels
    label=dbCreateLabel(cv list("annotate" "drawing7") 0.5*resWid:-halfPin
    "cdsName()" "centerRight" "R0" "stick" lh)
    label~>labelType="ILLabel"
    label=dbCreateLabel(cv list("annotate" "drawing") 0:-resHt*0.5
    "cdsParam(1)" "centerLeft" "R0" "stick" lh)
    label~>labelType="ILLabel"
    label=dbCreateLabel(cv list("annotate" "drawing") 0:(-resHt*0.5)-(lh*2)
    "cdsParam(2)" "centerLeft" "R0" "stick" lh)
    label~>labelType="ILLabel"
    ); let
    ); pcDefinePCell
    ;; save the symbol cellview
    dbSave(pcellId)
    dbClose(pcellId)

    ;; create the cell CDF
    let( (cellId cdfId)
    ;; need to get the cell dd object before creating the cell CDF
    unless(cellId = ddGetObj( library cell )
    error("Could not get cell %s." cell)
    )
    ;; delete the CDF if it already exists and then re-create it
    when(cdfId = cdfGetBaseCellCDF(cellId)
    cdfDeleteCDF(cdfId)
    )
    when(cdfId = cdfCreateBaseCellCDF(cellId)
    cdfCreateParam(cdfId
    ?name "connType"
    ?prompt "Connection Type"
    ?defValue "series"
    ?choices list("series" "parallel")
    ?type "cyclic"
    ?display "t"
    )

    cdfCreateParam(cdfId
    ?name "segNum"
    ?prompt "Number of Segments"
    ?defValue 1
    ?type "int"
    ?display "t"
    )

    ;; create the simulation information properties
    cdfId->simInfo = list(nil)
    foreach((simulator value) '(UltraSim ams auCdl auLvs cdsSpice hspiceD
    hspiceS spectre spectreS) '((nil) (nil) (nil) (nil) (nil) (nil) (nil)
    (nil) (nil))
    putprop(getq(cdfId simInfo) value simulator)
    )
    ;; create the Interpreted Labels Information and Other Information
    foreach((name value) '(formInitProc doneProc buttonFieldWidth
    fieldHeight fieldWidth promptWidth paramLabelSet paramDisplayMode
    instDisplayMode)
    '("" "" 340 35 350 175 "-connType -segNum" "parameter" "instName")
    putprop(cdfId value name)
    )
    cdfSaveCDF(cdfId)
    )
    )
    ); let

    Apologies if anything is missing, I will try to upload the file too. I'm pretty sure that I borrowed some ideas from Andrew when I wrote this, but any mistakes are mine!  Hope this helps.

    Regards,

    Lawrence.

    Filed under: , ,
    • Post Points: 5
  • Thu, Feb 2 2012 8:49 PM

    • skillUser
    • Top 10 Contributor
    • Joined on Fri, Sep 19 2008
    • Austin, TX
    • Posts 2,598
    • Points 16,075
    Re: Is it possible to parameterize a Multi Bit wire with vector expressions? Reply

    Hopefully this post has the file attached (never done this before, hope I got it right)!

    Regards,

    Lawrence.

    • Post Points: 20
  • Fri, Feb 3 2012 2:20 AM

    Re: Is it possible to parameterize a Multi Bit wire with vector expressions? Reply

    Here's a simpler version. Lawrence's code is creating some graphical artifacts which aren't really necessary if you only want to be able to netlist it (for example, there's no need to create the pins; terminals are enough). And  you wouldn't necessarily need a pcell symbol to go along with it.

    Your mileage may vary - just thought I'd given an alternative since I had one to hand!

    let( (CellLibrary pcellId)
      CellLibrary = "training"
      unless( ddGetObj(CellLibrary)
         error("Couldn't open library %L" CellLibrary)
      )
      
      pcellId =  pcDefinePCell(
         list( ddGetObj(CellLibrary) "rnsd" "schematic" "schematic" )
         
         /****************************************************************************
         /*
         /* Default Parameters
         /*
         /***************************************************************************/
         (
            (ns "1")
         )
         
         let(( pcCV masterCv instName instId netP netM numInsts)
           
           /*************************************************************************
           /*
           /* Get parameter values
           /*
           /************************************************************************/
           pcCV = pcCellView
           
           ;; open master cell view
           masterCv = dbOpenCellViewByType( "analogLib" "res" "symbol" nil "r" )
    
           ;; create the nets
           netP=dbMakeNet(pcCV "PLUS")
           netM=dbMakeNet(pcCV "MINUS")
    
           ;; create the terminals
           dbCreateTerm(netP "PLUS" "inputOutput")
           dbCreateTerm(netM "MINUS" "inputOutput")
    
           numInsts=atoi(ns)
           when(numInsts<1 numInsts=1)
           for(inst 1 numInsts
              if(inst==1 then
                 netP=dbMakeNet(pcCV "PLUS")
              else 
                 netP=dbMakeNet(pcCV sprintf(nil "net%d" inst-1))
              ) ; if
              if(inst==numInsts then
                 netM=dbMakeNet(pcCV "MINUS")
              else 
                 netM=dbMakeNet(pcCV sprintf(nil "net%d" inst))
              )
    
              ;; create instance
              sprintf(instName "R%d" inst)
              instId = dbCreateInst( pcCV masterCv instName (0:0) "R0" )
              dbCreateProp(instId "r" "string" "pPar(\"r\")/pPar(\"ns\")")
    
              ;; create instTerms for the instance to connect it up
              dbCreateInstTerm(netP instId dbFindTermByName(masterCv "PLUS"))
              dbCreateInstTerm(netM instId dbFindTermByName(masterCv "MINUS"))
    
           ) ; for
    
           dbClose( masterCv )
           ;; Always return true
           t
         ) ; ** let **
      )
      ; not sure if below is really necessary
      dbSave(pcellId)
      dbClose( pcellId ) 
    ) ; ** let ** 
    

     

    • Post Points: 20
  • Fri, Feb 3 2012 5:08 PM

    • WesZ
    • Not Ranked
    • Joined on Mon, Nov 14 2011
    • Posts 3
    • Points 45
    Re: Is it possible to parameterize a Multi Bit wire with vector expressions? Reply

    Thanks guys. This helps a lot. I think I will go with Andrew's answer for now for simplicities sake. I am fairly new to cadence having designed mostly on mentor tools. Definitely looking forward to learning as much as I can.

     

    • Post Points: 5
Page 1 of 1 (7 items)
Sort Posts:
Started by WesZ at 01 Feb 2012 03:19 PM. Topic has 6 replies.