Home > Community > Forums > Logic Design > RTL compiler - synthesis

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

 RTL compiler - synthesis 

Last post Tue, Jan 24 2012 12:13 PM by grasshopper. 1 replies.
Started by Ivan13 15 Jan 2012 05:19 AM. Topic has 1 replies and 3420 views
Page 1 of 1 (2 items)
Sort Posts:
  • Sun, Jan 15 2012 5:19 AM

    • Ivan13
    • Not Ranked
    • Joined on Mon, Nov 3 2008
    • Posts 6
    • Points 105
    RTL compiler - synthesis Reply

     I am traying to synthesize a design to a library with no basic inverters. In general, RTL compiler requires inverters and some other basic cells. and so i will recieve : "synthesis failed- do not have usable inverters". 

    My library have all the logical veriaty of cells except a straight forward inverter. meaning, including: (A+B'), AB', A(BC)'...... and alot more options to create an inverter out of them.. or to combine it with the approximate cells for one of the above functions .

    There-for, from the aspect of logical veriaty the synthesizer can deal with no specific inverters. Can I some-how delete this requirement of implicitly have an inverter cell ?   or am i some-how hitting on some heuristics that suddenly are invalid with the absence of the inverter??

     Thank you very much

    • Post Points: 20
  • Tue, Jan 24 2012 12:13 PM

    • grasshopper
    • Top 25 Contributor
    • Joined on Thu, Jul 17 2008
    • Chelmsford, MA
    • Posts 241
    • Points 3,200
    Re: RTL compiler - synthesis Reply
    Hi Ivan13, depending on what you are trying to do, it may be possible depending on your exact requirements. Please contact your local support and describe your specific requirements and they should be able to help regards, gh-
    • Post Points: 5
Page 1 of 1 (2 items)
Sort Posts:
Started by Ivan13 at 15 Jan 2012 05:19 AM. Topic has 1 replies.