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 freq divider pins in rflib 

Last post Wed, Dec 21 2011 11:10 PM by Andrew Beckett. 7 replies.
Started by ddis 14 Nov 2011 10:42 PM. Topic has 7 replies and 3707 views
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  • Mon, Nov 14 2011 10:42 PM

    • ddis
    • Not Ranked
    • Joined on Tue, Nov 15 2011
    • Posts 4
    • Points 80
    freq divider pins in rflib Reply

    hi all, i want to divide the o/p freq of Quad-VCO i.e. 4.8 GHz into 2.4 GHz. for this purpose i need a freq divider ckt. i saw the freq divider from RF library in cadence. it is containing 4 pins (pin, pout,nin, nout).

    how to apply stimulus to this pins & check the o/p

    i dont know what nout stands for here

    pin might be i/p power, pout might be o/p power

    nin might be divide no.

     

     

    • Post Points: 20
  • Tue, Nov 15 2011 6:10 AM

    Re: freq divider pins in rflib Reply

    Ask your supervisor?

    Seriously, do you think there is anywhere enough information in your question for anyone to be able to give a sensible answer? You have given no clue what "pin, pout, nin and nout" pins are, or what it is you're actually trying to find about the divider. Are you interested in whether it functionally works, what the rise time of the edges are, the noise performance, distortion - you could be asking anything.

    As explained in the Forum Guidelines, asking a specific and bounded question is much more likely to get an answer. Maybe if you read them and supply sufficient information, somebody can answer  you.

    Andrew.

    • Post Points: 5
  • Sat, Dec 17 2011 12:00 PM

    • ddis
    • Not Ranked
    • Joined on Tue, Nov 15 2011
    • Posts 4
    • Points 80
    Re: freq divider pins in rflib Reply

     

    i have figured it out they are differential i/p & o/p pins

    But when i try to open the block (by pressing q) in CDF parameter view i choose veriloga view & fill all the parameters such as n,VDD,VSS,nhi,dir,tt etc (i.e. all the parameters in the code) & try to simulate it by doing transient analysis then i am  getting o/p as 0(straight line) on both the pins 

     

     Are there any changes while simulating the veriloga code or we cannot use that block in schematic view ??????

    I have entered the Simulator stop view list as spectre veriloga ...........

    Still its not working......

     

    Thanks in advance......

     

     

    • Post Points: 20
  • Tue, Dec 20 2011 1:58 AM

    Re: freq divider pins in rflib Reply

    Most likely you have tt set to too large a value (or left blank). The default value of tt is 0.01 seconds (which is rather long, so the output probably doesn't change unless you have a very slow clock).

    I had the following parameters:

    n=8
    nhi=2   # output will be two pulses of the input pulse wide
    dir=1
    tt=1n
    vdd=1.2
    vss=0
    thresh=0.6  # this will be the default since it is (vdd+vss)/2.

    I had this connected to a vsource in "pulse" mode with:

    Zero value: 0
    One value: 1.2
    Period of waveform: 1u
    Rise time: 1n
    Fall time: 1n
    Pulse width: 500n

    Attached is a picture. This works exactly as you'd expect.

    Regards,

    Andrew.


    • Post Points: 20
  • Wed, Dec 21 2011 10:17 PM

    • ddis
    • Not Ranked
    • Joined on Tue, Nov 15 2011
    • Posts 4
    • Points 80
    Re: freq divider pins in rflib Reply

     thanks  a lot Andrew..

     i have a doubt....

     does it work only for input as pulse??

    cant we give sine wave as input 

    I want to divide the VCO output by 2 & VCO's o/p is sine wave.

     

     

     

     

    • Post Points: 20
  • Wed, Dec 21 2011 10:37 PM

    Re: freq divider pins in rflib Reply

    Yes, it works. Did you try? Provided you've got the threshold right - it simply looks when the threshold is crossed and uses that.

    Look in the veriloga code - it's fairly clear what it is doing, and there are comments at the top.

    Andrew.

    • Post Points: 20
  • Wed, Dec 21 2011 10:55 PM

    • ddis
    • Not Ranked
    • Joined on Tue, Nov 15 2011
    • Posts 4
    • Points 80
    Re: freq divider pins in rflib Reply

     

    Thanks Andrew

    it works for a sine wave by setting proper threshold but the o/p is a pulse....

     

     

    • Post Points: 20
  • Wed, Dec 21 2011 11:10 PM

    Re: freq divider pins in rflib Reply
    Yes, that's what the model is supposed to do.

    Andrew
    • Post Points: 5
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Started by ddis at 14 Nov 2011 10:42 PM. Topic has 7 replies.