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 RTL Compiler: Does coding style influence synthesis result? 

Last post Mon, Jun 27 2011 5:40 PM by grasshopper. 1 replies.
Started by Tzachi Noy 23 Jun 2011 07:51 AM. Topic has 1 replies and 3176 views
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  • Thu, Jun 23 2011 7:51 AM

    • Tzachi Noy
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    RTL Compiler: Does coding style influence synthesis result? Reply


    A specific cominational function can be coded in several ways. (See examples below)

    (1) Will different HDL implementations be synthesized differently?

    (2) If (1) is true, are there any guidelines of which coding style is better?


    for example - Find First Set

    module FFS_1(input wire [2:0] i, output wire [1:0] o);

        assign o = (i==0)?2'bxx:(i==1)?2'b01:(i<4)?2b'10:2'b11;



    module FFS_2(input wire [2:0] i, output reg [1:0] o);

       always @(i)


             integer j, found;

             found = 0;

             o = 2'bx;

             for (j=2; j>0; j=j-1)

                if (i[j] && !found)


                      found = 1;

                      o = j;




    Both modules are pure combinational logic and describe the exact same function (find first set bit with DC for input=0). Will the two have the same gate level implementation?

    Of course, this is only an example of a simple function (3b-->2b) so any student can use karnaugh maps to minimize. But I can think of a much more complicated example - change the input vector to be 100 bits wide, another input indicates a cyclic shift to apply to the input vecor, and the output are the indices of the 10 first set bits. This function is much easier to describe using an always block, it's easier to code, easier to read, and easier to change in case the function has to be changed. This is a 107b-->70b function... Will both styles result with same gate level? Can I expect one coding style to be better than the other (area/timing/etc.)?

    Of course, I'm only talking about the combinational parts, if I use more/less flops I won't expect same results, but my question is about the logic in between. Are there any guidelines?


    Thanks in advance

    • Post Points: 20
  • Mon, Jun 27 2011 5:40 PM

    • grasshopper
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    Re: RTL Compiler: Does coding style influence synthesis result? Reply

     Hi Tzachy Noy,

    There is more to good HDL coding than functional accuracy. In the case you provided they may not even be equivalent since I am not sure you accounted for don't care conditions in the same way so its X and Z behavior may differ. I would say that the goal of every tool is to arrive at an optimal solution irrespective of input but certain constructs lend themselves better to certain optimizations. Some enable better operator merging, some enable better structuring of CSA tree, some are more immune to X and Z issues in simulation, some will simulate faster.... you get the idea.

    As you indicated, once the cone of logic gets really complex, it is not unlikely that small changes in the coding style could lead to slightly different solutions. 10, 20 years ago tools were very sensitive to such changes but as tools matured they are less sensitive and closer to optimal. However, a small coding style change can still have a large impact in some cases.

    Even the use of hierarchy can have an impact in how fast or slow a given tool runs. Unfortunately, learning this is part education and part experience. On the education side you can start with RTL Compiler's HDL modelling guide and you can find a number of reasonable publications thought google searches as well.

     I know this is not the clear answer you were looking for but this is a topic that does not have a one-size-fits-all answer



    • Post Points: 5
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Started by Tzachi Noy at 23 Jun 2011 07:51 AM. Topic has 1 replies.