I was recently tasked with drawing Pcells of nfetxs layer by layer. I successfully completed a generic nfetx, but am having difficultly with the nfettwx. I have gotten the triple well (nfettwx) to pass DRC with no errors, however, when I run the LVS (Assura) errors pop up. They are:
*ERROR* Device 'nfettw(Generic)' on Schematic is unbound to any Layout device.
*ERROR* Device 'nfet(Generic)' on Layout is unbound to any Schematic device.
I believe the errors indicate that: In layout it recognizes the nfetx lying in the triple well, but does not recognize that it is apart of the whole block, the nfettwx. In the schematic it recognizes that there should be a nfettwx in the layout but does not see it there. My question, has anyone tried drawing an nfettwx layer by layer and run into this problem? I'm relatively new to this version of cadence (IC6.1.4) so any help would be appreciated!