Hi, I'm using Allegro Design Entry CIS 16.3...and I'm wondering if it is possible to use a VHDL file that executes logic (Thermometer to binary), and create a hierarchical block with it that will work in simulation for an ADC I'm designing?
I was able to create the VHDL file and then I placed a hierarchical block in my schematic that is referenced to that file, but no input or output pins show up on the rectangular symbol. I think my VHDL code is good, but again is it even possible to do what I want to do?
thanks
Dave