Thank you for your assistance. I did notice that could use Matlab. I want write code that will take the netlist file and scan through it to extract certian details about the circuit which would help compare how different inputs effect the power dissipation. I was thinking about using encounter to do this but I'm using dynamic logic circuits. Therefore, I plan to use virtuouso for schematics and layout. If encounter can use my verilog netlist to calculate power dissipation that would be great. I was just under the impression that encounter uses the verilog file to generate a layout with static logic gates, am I wrong?