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 Clock Gating: Pre or Post Control 

Last post Mon, Feb 14 2011 6:17 AM by moogyd. 3 replies.
Started by moogyd 11 Feb 2011 12:14 AM. Topic has 3 replies and 3096 views
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  • Fri, Feb 11 2011 12:14 AM

    • moogyd
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    Clock Gating: Pre or Post Control Reply

    Hi,

    I am currently using lp_clock_gating_control_point set to postcontrol, simply because this was set in the the scripts I inherited.

     Are there any signficant advantages of postcontrol over precontrol?

    I guess that postcontrol has a slight timing advantage, since precontrol has an additonal gate in the EN-D path.

    Anything else? Which option do other users prefer or use?

    Thanks,

     Steven

     

    • Post Points: 35
  • Fri, Feb 11 2011 5:34 AM

    • grasshopper
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    Re: Clock Gating: Pre or Post Control Reply

     Hi Steven,

    timing is certainly a difference but I believe the biggest difference is observabiliy for DFT coverage purposes. Post control limits your ability to check proper operation of the CG latch if not mistaken

    gh-

    • Post Points: 5
  • Fri, Feb 11 2011 6:43 AM

    • bmiller
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    Re: Clock Gating: Pre or Post Control Reply

    I suggest you check your target standard cell library to determine what kind of clock gating cells are available.  In many cases only one type is available.  For example:

    $ grep clock_gating slow.lib
      clock_gating_integrated_cell : "latch_posedge";
      clock_gating_integrated_cell : "latch_posedge";
      clock_gating_integrated_cell : "latch_posedge_precontrol";
      clock_gating_integrated_cell : "latch_posedge_precontrol";

     In this case, you would want to use precontrol.  If you chose post-control RC would be forced to build the clock gating cell from primitive components, which is obviously not what you would want.

    Brad

     

    • Post Points: 20
  • Mon, Feb 14 2011 6:17 AM

    • moogyd
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    • Joined on Mon, Mar 22 2010
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    Re: Clock Gating: Pre or Post Control Reply

    Hi,

    Brad, the library I am using contains both pre and post control integrated cells, so this is not an issue I need to consider.

    Grasshopper, I am not sure I understand your comment. I guess you mean that we will catch failts on the D input of the latch?

    Thanks for the feedback,

    Steven

    • Post Points: 5
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Started by moogyd at 11 Feb 2011 12:14 AM. Topic has 3 replies.