Thank you for the answer.
In details, i have
incoming DS-encoded data (two signals -SIN and DIN). According to the
standard of DS-encoding, clock signal for this data can be produced by
XORing SIN and DIN. So, my project contains XOR component for this
operation. On the output of XOR i define clock in the manner, i
As i understand, generated_clock must have some source clock, but in my project frequency of data transmission in DS-encoded channel is absolutely independant on any inner clock signals. So, as i understand, i cant use generated_clock here.