Dear All,
Currently I use the hierarchical compare for rtl to synthesized netlist LEC.
The sub-modules are all equivalent and are set to blackbox after comparison.
However, there are blackbox nonequivalent occur when comparing the top module.
For example:
In rtl:
module top(inA, ....);
input [31:0] inA;
...
wire [31:0] inB;
assign inB = inA;
sub1 usub1(.in1(inB), ...);
...
endmodule
In netlist:
module top(inA, ....);
input [31:0] inA;
...
sub1 usub1(.in1(inA), ...);
...
endmodule
The sub-module sub1 is compared firstly and set to blackbox.
But sub1 will be reported as nonequivalent BBOX after comparing top module top.
I found the problem is due to the connection wire name of blackbox are changed after synthesis optimization.
So is there any command that can solve this kind of blackbox nonequivalent problem??
Thanks a lot!!