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 automatic parametrised layout 

Last post Fri, Feb 5 2010 11:01 PM by skillUser. 4 replies.
Started by Sabyasachi 05 Feb 2010 10:24 AM. Topic has 4 replies and 2078 views
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  • Fri, Feb 5 2010 10:24 AM

    • Sabyasachi
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    • Joined on Fri, Aug 7 2009
    • kharagpur, West Bengal
    • Posts 5
    • Points 115
    automatic parametrised layout Reply

     hello all ,

                     I am novice in SKILL language. Can anybody help me to generate layout of different components. My aim is to write  a SKILL code that will take parameters like length width finger number and will generate layout of the transistor with those given parameter.

    Thanking in advance

     

    Sabyasachi Deyati
    M Tech ( 4th Semester) Microelectronics & VLSI Design
    Electronics & Electrical Communication Engineering
    Indian Institute of Technology , Kharagpur
    • Post Points: 35
  • Fri, Feb 5 2010 12:01 PM

    • Quek
    • Top 10 Contributor
    • Joined on Wed, Oct 14 2009
    • Singapore, 00-SG
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    Re: automatic parametrised layout Reply
    Hi Sabyasachi

    I am not sure if you are just trying to practise coding pcells but for layout purposes, I think it might be easier for you if you simply use the parametrized cells (pcells) that comes with your process design kit (pdk). A pcell can be a mos, cap, bjt, res, etc and its layout can change according to the parameters (e.g. W and L) that user changes in its properties form.

    Best regards
    Quek
    • Post Points: 20
  • Fri, Feb 5 2010 1:27 PM

    • Sabyasachi
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    • Joined on Fri, Aug 7 2009
    • kharagpur, West Bengal
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    Re: automatic parametrised layout Reply

     Thanks  Quek 

    Could you please elaborate it . I am using IC 5141 version. Could you please tell me how to use those  pcells

    • Post Points: 20
  • Fri, Feb 5 2010 4:03 PM

    • Quek
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    Re: automatic parametrised layout Reply

    Hi Sabyasachi

    You simply need to open a new layout, press "i" to bring up create instance form, browse to any pcell in the technology library and place them in the layout. You can now change their parameters using the properties form.

    To have an idea of how pcells work, you can use the cell design tutorial in the IC5141 installation:
    unix>cp -r $CDSHOME/tools/dfII/samples/tutorials/le/cell_design ~
    unix>cd ~/cell_design
    unix>icfb &

    Open layout of cell "inv" from "master" library. Change some of the parameters (W, L, fingers) of the nmos and pmos and observe how the layout changes.

    The tutorial manual is located at: $CDSHOME/doc/celltut/celltut.pdf

    By the way, actually IC5141 release spans at least 7 years so actually "IC5141" alone does not provide much useful info. It would be great if in future, you can also provide the specific sub-version:

    unix>icfb -W

    Best regards
    Quek

    • Post Points: 5
  • Fri, Feb 5 2010 11:01 PM

    • skillUser
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    • Joined on Fri, Sep 19 2008
    • Austin, TX
    • Posts 2,604
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    Re: automatic parametrised layout Reply

     Hi Sabyasachi,

    In addition to what Quek has said, there are some sample SKILL PCell code examples in the installation hierarchy, and also a generic Process Design Kit ("gpdk") that you can look at and play with.  Take a look in the following directories:

    <cds_install_dir>/tools/dfII/samples/ROD/rodPCcells

    <cds_install_dir>/tools/dfII/samples/tutorial/abstract/pdk

    where "<cds_install_dir>" can be found using "cds_root icfb", for example. Also the documentation contains example PCell SKILL code, though you may have to dig for it.

    regards,

    Lawrence.

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Started by Sabyasachi at 05 Feb 2010 10:24 AM. Topic has 4 replies.