ELC doesn't simulate anything 

 Hi All,

I'm having a problem getting elc to run any simulations. I'm currently testing on two small inverters. 

 Whenever I run db_spice I get the following message: 

 [WARNING(db_spice)]No spice simulation to do, please check the cell/process list for any error

I can't find any errors in my configuration files. Would someone please look at them and tell me if they see anything wrong?

Here is my elccfg:

 #Specify the environment variable settings.
EC_SIM_USE_LSF=1;
EC_SIM_LSF_CMD=" ";
EC_SIM_LSF_PARALLEL=2;
EC_SIM_TYPE="hspice";
EC_SIM_NAME="hspice";
EC_SPICE_SIMPLIFY=1;
EC_CHAR="ECSM-TIMING ECSM-POWER";
 
#Specify the characterization inputs.
 
SUBCKT="my_cells.sp";
MODEL="my_typical_models.sp";
DESIGNS="INVX1 INVX2";
SETUP="my_setup.ss";
PROCESS="typical";

And here is my_setup.ss:

 Process my_typical_process {
        voltage = 1.5;
        temp = 25;
        Corner = "typical";
        Vtn = 0.320;
        Vtp = 0.316;
};

Group POWR{
        PIN = VDD;
};

Index inv_index {
        Slew = 0.028n 0.044n 0.076n 0.138n 0.264n 0.516n 1.02n ;
        Load = 0.00079p 0.002054p 0.00474p 0.010112p 0.020856p 0.042186p 0.08532p ;
};

Signal std_cell_sig {
        unit = REL;
        Vh=1.0 1.0;
        Vl=0.0 0.0;
        Vth=0.5 0.5;
        Vsh=0.8 0.8;
        Vsl=0.2 0.2;
        tsmax=2.0n;
};

Signal power_sig {
        unit = ABS;
        Vh=1.5 1.5;
        Vl=0.0 0.0;
        Vth=0.75 0.75;
        Vsh=2.0 2.0;
        Vsl=0.5 0.5;
        tsmax=2.0n;
};

 Margin m0 {
        setup   = 1.0 0.0 ;
        hold    = 1.0 0.0 ;
        release = 1.0 0.0 ;
        removal = 1.0 0.0 ;
        recovery = 1.0 0.0 ;
        width   = 1.0 0.0 ;
        delay   = 1.0 0.0 ;
        power   = 1.0 0.0 ;
        cap     = 1.0 0.0 ;
};

Nominal n0 {
        delay = 0.5 0.5 ;
        power = 0.5 0.5 ;
        cap   = 0.5 0.5 ;
};

Simulation std_cell_sim {
        transient = 0.01 80n 10p;
//      dc = 0.1 4.5 0.1;
        bisec = 6.0n 6.0n 100p;
        resistance = 10MEG;
};

set process(my_typical_process) {
        simulation = std_cell_sim;
        index = inv_index;
        signal = std_cell_sig;
        margin = m0;
        nominal = n0;
};

set signal(my_typical_process) {
        Group(POWR) = power_sig;
};

Thanks!

Hi, I have exactly the same problem.

How did you specifically solve the problem?

Here is my  elccfg file

###########################

#Specify the environment variable settings to use for characterization.
EC_SIM_USE_LSF=1;
EC_SIM_LSF_CMD="";
EC_SIM_LSF_PARALLEL=10;
EC_SIM_TYPE="spectre";
EC_IGN_XTG=1;
EC_SIM_NAME="spectre";
EC_CHAR=“ECSM-TIMING ECSM-POWER”;
set_var EC_SPICE_SUPPLY1_NAMES = "vdd vdd2";
set_var EC_SPICE_SUPPLY0_NAMES = "gnd gnd2";
set_var EC_HALF_WIDTH_HOLD_FLAG = true;


#Specify the characterization inputs.
SUBCKT="osu05_stdcells.sp";
MODEL="ami05.m";
DESIGNS="INVX1";
SETUP="setup.default";
PROCESS = "elc_process";

######################

And here my setup file

#########################

Process typical{
    voltage = 5.0;
    temp = 25;
    Corner = "";
    Vtn = 0.65;
    Vtp = 0.95;
};

Signal std_cell {
    unit = REL;
    Vh=1.0 1.0;
    Vl=0.0 0.0;
    Vth=0.5 0.5;
    Vsh=0.8 0.8;
    Vsl=0.2 0.2;
    tsmax=2.0n;
};

Signal VDD5.0V {
    unit = ABS;
    Vh=5.0 5.0;
    Vl=0.0 0.0;
    Vth=2.5 2.5;
    Vsh=2.0 2.0;
    Vsl=0.5 0.5;
    tsmax=2.0n;
};
   
Simulation std_cell{
    transient = 0.1n 80n 10p;
    dc = 0.1 4.5 0.1;
    bisec = 6.0n 6.0n 100p;
    resistance = 10MEG;
};

Index X1{
    Slew = 0.100n 0.30n 0.7n 1.0n 2.0n;
    Load = 0.025p 0.05p 0.1p 0.3p 0.6p;
};

Index X2{
    Slew = 0.100n 0.30n 0.7n 1.0n 2.0n;
    Load = 0.050p 0.10p 0.2p 0.6p 1.2p;
};

Index X4{
    Slew = 0.100n 0.30n 0.7n 1.0n 2.0n;
    Load = 0.1p 0.2p 0.4p 1.2p 2.4p;
};

Index X8{
    Slew = 0.100n 0.30n 0.7n 1.0n 2.0n;
    Load = 0.2p 0.4p 0.8p 2.4p 4.8p;
};

Index Clk_Slew{
    bslew = 0.100n 0.5n 1.0n;
};

Index IO5x5{
    Slew = 0.1n 0.3n 0.6n 1.3n 3.0n;
    Load = 5p 10p 20p 50p 75p;
};

Group POWR{
    PIN = *.Vdd *.Vdd2;
};

Group Core_Pins{
    PIN = *.DO *.DI ;
};

Group Pad_Pins{
    PIN = *.YPAD ;
};

Group X1{
    CELL = *X1 ;
};

Group X2{
    CELL = *X2 ;
};

Group X4{
    CELL = *X4 ;
};

Group X8{
    CELL = *X8 ;
};

Group Clk_Slew{
    PIN = *.CLK ;
};

Margin m0 {
    setup     = 1.0 0.0 ;
    hold     = 1.0 0.0 ;
    release = 1.0 0.0 ;
    removal = 1.0 0.0 ;
    recovery = 1.0 0.0 ;
    width    = 1.0 0.0 ;
    delay     = 1.0 0.0 ;
    power     = 1.0 0.0 ;
    cap     = 1.0 0.0 ;
} ;

Nominal n0 {
    delay = 0.5 0.5 ;
    power = 0.5 0.5 ;
    cap   = 0.5 0.5 ;
} ;

set process(typical){
    simulation = std_cell;
    signal = std_cell;
    margin = m0;
    nominal = n0;
};

set index(typical){
    Group(X1) = X1;
    Group(X2) = X2;
    Group(X4) = X4;
    Group(X8) = X8;
    Group(Pad_Pins)  = IO5x5;
    Group(Core_Pins) = X4;
    Group(Clk_Slew)  = Clk_Slew;
};

set signal(typical){
    Group(POWR) = VDD5.0V;
};
 

 Hi,

I need to look at your spice netlist file to see whether something wrong there or not.

Regards,

Affaq