Home > Community > Forums > Functional Verification > Async signal assetions

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

 Async signal assetions 

Last post Mon, Aug 3 2009 11:32 PM by JoergM. 1 replies.
Started by SVA1 03 Aug 2009 11:11 PM. Topic has 1 replies and 1201 views
Page 1 of 1 (2 items)
Sort Posts:
  • Mon, Aug 3 2009 11:11 PM

    • SVA1
    • Not Ranked
    • Joined on Tue, Aug 4 2009
    • Posts 1
    • Points 20
    Async signal assetions Reply

    Hi,

    There is one async signal a_sync, this signal needs to be stable till first incoming clk.  a_sync signal may get change any time irrespective to clk.

    I have written property as follows, it works fine for single bit, but for multibit a_sync signal I need help.

    property abc(a_sync, clk);

     int temp_val; 

      @(a_sync) (1,temp_val = ~a_sync /*inverse because previous value will be sampled*/ ) ##1

       @(posedge clk) (temp_val === a_sync);
    endproperty

     

    This wont work for multibit signal. How can we do for multibit. There are many such signal, so I want to write generic assetion property.

    -Kunal 

    • Post Points: 20
  • Mon, Aug 3 2009 11:32 PM

    • JoergM
    • Top 500 Contributor
    • Joined on Thu, Jul 17 2008
    • Munich, Bavaria
    • Posts 28
    • Points 550
    Re: Async signal assetions Reply

    Hi Kunal,

    pretty much code for a simple behavior. Did you consider PSL for this property? PSL has 2 advantages: unclocked properties and initial properties. Example:

    abc: assert stable(a_sync) until(clk);

    It would be evaluated each time an event on a_sync or clk occurs. I assume this is the behavior you describe?

     Joerg.

    • Post Points: 5
Page 1 of 1 (2 items)
Sort Posts:
Started by SVA1 at 03 Aug 2009 11:11 PM. Topic has 1 replies.